PCA9306: [I2C] clock missing during I2C communication

Part Number: PCA9306
Other Parts Discussed in Thread: P82B715

Hello.

I am writing to inquire about the missing clock count during I2C (Master) communication in the circuit configured below. Could you please explain the cause of this issue and how we can resolve it?

 - FPGA: I2C Master(Xilinx AXI IIC IP), 100kHz

 - 0x54 address output

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  • Hi JeongGuk,

    I see 5 clock pulses. Is your FPGA driving correctly on the I2C? 

    The PCA9306 is a passive level translator. It does not actively drive a signal or generate I2C. 

    I don't know the devices inbetween the probe. 

    P82B715 is a buffer for I2C, but wouldn't be responsible for missing clock pulses here. 

    Regards,

    Tyler

  • Upon verification using the ILA within the FPGA, the waveform is output identically. For reference, the Xilinx AXI IIC IP is being used internally. Could this be an operational issue with the IP?

  • Hi JeongGuk,

    The I2C master is not outputting a correct I2C waveform on SDA and SCL. The start and stop conditions are present, but we should see a total of 9 SCL clock pulses, 7 address, 1 bit for read/write, 1 bit for ACK/NACK. 

    Sounds like a firmware issue at the moment. 

    Regards,

    Tyler

  • The circuit operated normally after I changed the 2.2k pull-up resistor on the right side of the PCA9306 to 4.7k. What is the effect of using different pull-up resistor values ​​on the left and right sides of the PCA9306?