Part Number: TUSB2E11
Hi
Could you please help confirm the following?
The I²C and I/O voltage are both 1.8V.
Also, could you please confirm if the full part number of the eUSB repeater is TUSB2E111YCGR?
Thanks for your help.

Part Number: TUSB2E11
Hi
Could you please help confirm the following?
The I²C and I/O voltage are both 1.8V.
Also, could you please confirm if the full part number of the eUSB repeater is TUSB2E111YCGR?
Thanks for your help.

Hi Gareth,
Variant TUSB2E111YCGR configures both the I2C pins and the GPIO pins for 1.8V I/O voltages. Variant TUSB2E112YCGR configures both the I2C pins and the GPIO pins for 1.2V I/O Voltages. Essentially, these variants allow you to select what input voltage levels can be used.
So for example, with the TUSB2E112YCGR, I2C lanes would need to be PU to 1.2V, and if GPIO mode is used and one of the GPIO pins is PU, that pin would need to be PU to 1.2V. For TUSB2E111YCGR, that would be 1.8V instead.
The full orderable part number for these variants would be TUSB2E111YCGR and TUSB2E112YCRG, yes. The final digit (TUSB2E11XYCGR) indicates the input voltage.
Thanks,
Ryan
Hello,
Closing this thread due to inactivity. Feel free to reply if there are any questions.
Thanks,
Ryan
Hi Ryan
I have two questions:
1. For the TUSB2E111YCGR layout with 3.3V, what are some suggestions for routing the traces? Currently, the ball-to-ball gap is only 5.7 mil, and the 3.3V net is 3.5 mil. The net-to-ball gap will be very small, making the trace difficult to route. Any suggestions? The PCB is Type 3.
Does the datasheet layout indicate that the 3.3V pin is directly connected via VIA to the corresponding position on the ball?


2. Does the TUSB2E111YCGR chip come with a QFN package?
Hi Gareth,
1. For the TUSB2E111YCGR layout with 3.3V, what are some suggestions for routing the traces? Currently, the ball-to-ball gap is only 5.7 mil, and the 3.3V net is 3.5 mil. The net-to-ball gap will be very small, making the trace difficult to route. Any suggestions? The PCB is Type 3.
Does the datasheet layout indicate that the 3.3V pin is directly connected via VIA to the corresponding position on the ball?
For the VDD pins in the center of the device, we typically use vias for these pins, yes. We use vias to connect these pins to the layer with their relevant power plane. Our TUSB2E11EVM follows this methodology. If needed, I can send these layout files over as an example.
2. Does the TUSB2E111YCGR chip come with a QFN package?
We do not have a QFN package for the TUSB2E11. However we are developing a new 1-port eUSB2 repeater, the TUSB2E113, which will have a QFN package. If there is interest in that, please reach out to Randy Lawson (r-lawson@ti.com) for more information.
Thanks,
Ryan