Hi Sean, 

           How do we calculate the maximum number of nodes allowed for our design? Can we use the formula Nodemax=(Cbus_max‑Ccable)/Cnode for this calculation? Is the Cbus_max for this IC is 100pL for all the allowed speed? Nodemax=(100pf-Ccable)/12pf, seems the Nodemax<8? I am confused by this calculation result，and DC loading and stub effects are not considered.

Best Regards,

Liz

Hi Sean，

          And I found a related case shows that "At 2Mbps, a significant delay between TXD and RXD is seen at 2nF overall bus capacitance. At 4Mbps, 1nF overall bus capacitance is showing significant delay, and 2nF alters the RXD waveform enough to make it very difficult for the controller to read the data back on RXD. And as the data rates get higher they are more susceptible to less capacitance causing significant waveform distortion. "

Thanks,

Liz

Hi Liz,

Today is a holiday. Please give until tomorrow for some feedback, thanks. 

Best Regards,

Michael. 

Hi Liz,

ISO11898-2 defines the timing characteristics under certain bus load, that means a CAN transceiver conforms to the ISO standard has to meet that spec at the same test condition. It doesn't necessarily mean the maximum allowed bus load is 100pF.

Here is an app note for your reference: https://www.ti.com/lit/an/slla270/slla270.pdf

Regards,

Sean

Hi Sean, 

           Thank u  for your reply. Does ISO 11898 also contain similar provisions for CAN FD? Are there recommended maximum numbers of nodes and maximum transmission distances specifically for CAN FD at different speeds? I have noticed a similar formula in the document. Can I use this formula to estimate the number of nodes for CAN FD?

Thanks,

Liz

hi Sean，

        Can I use C_busmax=I_sourcemax/(dv/dt) to calculate the maximum allowable bus capacitance of this CAN driver chip? At 4Mbps, I may take dv/dt=2V/25ns=80V/us, but I am not sure which parameter is for I_source for TCAN1042，is it the ICC? Thanks.

Best Regards,

Liz

Hi Liz,

ISO11898 does not define a hard maximum node count for either CAN or CAN FD. For CAN FD, the node number can be implemented in the same way as classical CAN, but as the data phase rate can go up to 2-5 Mbps, the communication distance is drastically reduced. With the bus length limited within a few meters (mainly automotive applications) there should be no issue for 12 nodes at 4Mbps. You will need to use TCAN1042G due to the device without G suffix only supports up to 2Mbps. I recommend migrate to our newer device TCAN1044A-Q1 which has 8Mbps capability with lower price and longer term of supply.

Liz Jiang said:

Can I use C_busmax=I_sourcemax/(dv/dt) to calculate the maximum allowable bus capacitance of this CAN driver chip? At 4Mbps, I may take dv/dt=2V/25ns=80V/us, but I am not sure which parameter is for I_source for TCAN1042，is it the ICC? Thanks.

I don't think it is a good approach to estimate bus load capacitive. The Cload here represents the total difference bus capacitance of the whole bus, as shown in figure below, but it is hard to know what could be the maximum current across the differential signal. A general rule of thumb is keeping total bus capacitance low enough that the RC time constant is a small fraction of the bit time. A common dominant to recessive decay time constant could be  ≈ 1.4 * RC, given that dominant differential voltage has a typical 2V nominal value and recessive to be 0.5V

At 4 Mbps, your data bit time is exactly 250 ns. A CAN controller samples the bit at roughly 75% to 80% into the bit window. This means the signal must be  stable by around 187.5ns. Standard CAN FD transceivers feature a maximum loop delay specification of up to 255ns (standardized limit in ISO 11898-2, still with CL= 100pF). Therefore, at 4 Mbps and above, you need to enable TDC (Transceiver Delay Compensation) on your CAN FD controller, so the controller checks for bit errors later in the bit window, decoupling the data phase bit rate limits from the physical transceiver's static loop delay. 

Regards,

Sean

Hi Sean,

     We have a new requirement now. There are 16 nodes, the transmission speed must be at least 4 Mbps, and the total transmission distance is 1.8 meters. 0.5 meters of this distance is via a cable connecting two chassis, all nodes are mounted on the backplane, and the PCB material is standard FR4.

     Per your reply, it seems that there is no theoretical calculation formula to estimate whether this combination of length and number of nodes is feasible or not, am I right.? When selecting the CAN FD driver chip, is it crucial to choose one with a higher supported speed (for example 12Mbps is better than 8Mbps)and a lower single-point capacitance? 

    Once our product is ready, should we mainly focus on the tested waveform's rise time and fall time not exceeding 20% of the entire period, correct signal levels, no obvious issues such as overshoot or undershoot, and no packet loss during power cycle testing? If all these conditions are met, can we basically ensure the reliability of CAN FD communication?

Thanks,

Liz

Hi Liz,

You are correct that there is no general calculation formula, CAN replies heavily on bench test and simulation for those system-level testing. I can share a CAN FD performance presentation using TCAN1042-Q1 if you could send me an email at s-guo2@ti.com.

12Mbps is not theoretically supported by CAN FD, it is in the domain of CAN XL, which requires a specific CAN XL transceiver + CAN XL controller. The limitation of CAN FD is 8Mbps which could be supported by most TI's CAN FD transceiver, but in real practice we would recommend CAN FD SIC transceivers when the data rate go above 5Mbps, especially if the network topology is not ideal, e.g star network. You can find more information about why SIC transceiver is needed in this app note: https://www.ti.com/lit/an/sdaa190/sdaa190.pdf

You should mainly focus on whether there is error bit reported by the controller once the simulation network is established. An overshoot or undershoot are usually caused by common mode noise, which you can add a common mode choke to suppress those noise. You might also observe signal ringings during dominant to recessive transition caused by bus impedance mismatch which is very common in non-ideal topology. At higher data rate it could potentially generate error bits. A CAN FD SIC transceiver is designed for this kind of situation.

A few tips on schematic & layout:

• Add common mode choke for EMC optimization
• Use split termination (see related section in datasheet)
• Choose ESD diode with small capacitive load
• Make sure the CAN traces to be symmetric, avoid using vias on CAN signals, reduce number of left and right turns

Regards,

Sean

hi sean,

          Thank u! And I will send your my email.

Best Regards,

Liz

Hi Liz,

I sent the file via email. Let me know if you have further questions.

Regards,

Sean