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TMDS1204: Inquiry regarding the application of TMDS1204

Part Number: TMDS1204
Other Parts Discussed in Thread: TDP1204

I am trying to output TMDS/FRL signals by applying an HDMI IP to an FPGA.

But due to the characteristics of the FPGA GT (GPIO out), it only supports a 0 to 800mV swing without a common-mode voltage.

However, it is my understanding that the standard signal for TMDS/FRL is a 500mV swing with a 3.3V common mode.

Therefore, I would like to use the TMDS1204 to convert the 0 to 800mV signal into a signal with a 3.3V common mode.

I am inquiring whether it can be used for this type of application.

Additionally, is there a specific part that needs to be configured via I2C when the TMDS1204 outputs TMDS or FRL?

 

  • Hi,

    You can use TDP1204 or TMDS1204 for this particular design. 

    The connection between FPGA and TDP/TMDS1204 will be AC coupled.

    TDP/TMDS1204 will be set into the limited mode (LINEAR_EN = 1) so their output is decoupled from the FPGA output. TDP/TMDS1204 output will then be controlled by their TXSWING.

    Thanks

    David

  • Hello David, 

    Thanks for supporting customer. I'm reaching you to request a schematic review. 

    I will send the customer schematic via TI internal access but, it will be nice if you can add answers here so for customer's fast catch-up. 

    Please check if there is anything wrong on strap settings. 

    Customer's system requirements: 

    - FPGA -> TMDS1204  -> Sink  (HDMI 1.4)

    - TMDS configurations  :  1. Pin Strap mode, 2. Limited mode, 3. EQ setting (5), 4. CTLEMAP_SEL(F) = 3Gbps CTLE 

  • Due to PCB routing and layout constraints between the TMDS1204 and the receptacle, we are experiencing cross-over issues with the differential signal pairs (P/N traces). Therefore, we would like to know if the TMDS1204 supports P/N (Polarity) Swap.

    Specifically, please clarify the following questions:

    1. Does the TMDS1204 support P/N (Polarity) Swap? If yes, is there a hardware configuration (e.g., using multi-level pin-strapping) to invert the polarity of the differential inputs/outputs?

    2. If we intentionally swap the P/N traces on the input side (between the Host(FPGA) and the TMDS1204 RX), will the TMDS1204 successfully pass the inverted signal to the TX side as a simple inverted analog output, allowing us to swap the P/N traces again on the output side (between the TMDS1204 TX and the HDMI Receptacle) to restore the original polarity?

    3. If P/N Swap is not supported at all, what is the recommended layout workaround for routing the high-speed differential signals without deteriorating signal integrity?

  • Hi,

    Since TMDS1204 is a re-driver, it can support P/N (Polarity) Swap as long as the polarity matches between the input and the output. So if you swap the polarity at the input, you will need to swap the polarity at the output as well.

    Thanks

    David

  • Hello, Mr.David

    I checked TMDS1204 schematic(Samsung)_TI reviewed file and I reply like below about your comments.

    1. Since you are using the DDC snooping option to configure the TMDS1204 for HDMI1.4/2.0/2.1. Do you plan to configure the TMDS1204 using I2C bus?

        - I don't have a plan to use the TMDS1204 for HDMI 2.0/2.1. And I will use the TMDS1204 only for HDMI1.4 without I2C mode.

    2. For D1401 and D1402, please make sure its line capacitance is small enough to support the required data rate. Please see section 8.2.2.4 of the TMDS1204 datasheet for more detail.

        - the materials are PUSB3FR4 which TI recommend. 

  • Hi,

    I am ok with your schematic capture, you can also send us the layout file for review if needed.

    Thanks

    David