Part Number: DS90UB927Q-Q1
Other Parts Discussed in Thread: DS90UB928Q, ALP
Hello Team,
We have the following setup:
- Serializer: DS90UB927Q
- Display Resolution: 1920 × 384 @ 60 Hz
- Serializer-Deserializer link is established and we would like to use the internal test pattern generator to validate the FPD-Link connection independently of the video source.

Could you please share any application note, reference guide, EVM example, or register configuration for enabling the test pattern generation on the DS90UB927Q/DS90UB928Q pair, particularly for a custom resolution of 1920 × 384 @ 60 Hz?
Any example configuration or timing-register settings would be highly appreciated.
Thank you for your support.
Best Regards,
Shammi