Part Number: DS40MB200
We use DS40MB200 Port 1 for primary/redundant CML paths.
Please confirm the complete behavior when LB1A = LOW and LB1B = HIGH, with LI_1 and SIA_1 carrying valid AC-coupled CML data:
1. Is SOA_1 actively driven from SIA_1?
2. Is SOB_1 actively driven from LI_1, or is it muted, disabled, high impedance, or static in this state?
3. Is there any supported control state that makes only SOA_1 or SOB_1 electrically idle, high impedance, or near 0 V while the other output remains active?
4. For any disabled or non-driven state, please specify output DC common-mode voltage and impedance, including whether the internal nominal 50 ohm pullups to VCC remain present.
Our requirement is to prevent voltage/back-power on an inactive external redundant cable while the other Port 1 output operates at 2.5 Gb/s. “No valid data” alone is insufficient; we need a documented inactive or isolated output condition.
