Hi
Dose TI has 270Mbps Deserializer for SDI?
If has in TI,
I'd like to replace with TI...
How about LMH0341 or CLC031A?
pls refer to the attached datasheet of current solution.
Thanks...
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Greetings -
YES, with the acquisition of National Semiconductor, TI now has an extensive family of devices for SDI / SMPTE applications.
You noted a SD 270 Mbps rate SDI , please see the CLC020 or CLC021.
The complete line of SDI SERs can be viewed at:
Best Regards;
John Goldie
DPS Apps / SVA
John talked about serializers. For replacing a 270 Mbps SDI deserializer, we have the following options:
The LMH0071 requires a host FPGA but offers flexibility and a future upgrade path.
Here is a link to TI's complete line of SDI Deserializers:
Hi Gary,
I have a problem using LMH0071 in receiving DVB-ASI signal and want to replace it to another chip. The lmh0071 in DVB-ASI mode does not receive ASI signal in continuous mode ( the chip is function correctly when ASI input stream is in burst mode because burst mode meets the device's bugy requirement of up to 110 consecutive k28.5 characters to 8b/10b decoder to lock and in contiuous mode at the rates above approx 15mbps the chip does not lock)
I have found that Ti has pin compatible serdesDS32ELX0124 which can be used but unfortuneatly serial input freqency range is from 1.25 to 3.215Gbps. do you have any idea what can I do?
Regards,
Ramin
Ramin
I would suggest staying with the LMH0071, and working around the DVB-ASI issues with IP in the FPGA. There is some enhanced DVB-ASI support code here: http://www.ti.com/tool/broadcast_video_serdes_ip
Mark Sauerwald
Dear Mark,
Thank you for suggestion,
As you may know in DVB-ASI mode the 8b/10b decoder is in the signal path and the chip does not lock,
so at the frist I should bypass the 8b/10b decoder and for doing this I should change device mode to SDI, and then use IP in FPGA to implement 8b/10b decoder, the fisrt question for me is that the SDI input has frame sync characters which when we give DVB-ASI signal and the chip is configured at SDI mode these characters will not receive to device and instead the device will receive k28.5 characters, will the device align data to these characters in SDI configuration and give the 10 bit characters to FPGA?
Thank you again for prompt reply
Regards
Ramin