TL16C550 - lowest possible input clock

In our project we are going to perform JTAG-testing of the board which is include TL16C550DIPFBR. During the JTAG test we would like to receive and send a couple of the UART - messages to check if the TL16C550DIPFBR is working on. But during this test we can provide only the low speed clock for TL16C550DIPFBR (in a range of 50...200kHz) 

So the question is: 
1. Can we provide a low speed clock for the TL16C550DIPFBR to perform such test ? Does TL16C550DIPFBR could be configured in a such way to allows receiving and sending of the massages ? 
2. If the low speed clock (50...200kHz) is not allowable, could we expect that at least  parallel bus transaction will be successfully complete. So in this case we are able to check only bus connection between the Host MCU and TL16C550DIPFBR.