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TLK100 RX MII CLOCK not toggling

Test Setup:

TLK100 is set up to transmit/receive 10Mb/s in Full Duplex mode.  Ixia was used to generate packets with IPG of 9.6us to test minimum IPG.  Packets include 8 preamble bytes (including SFD) and 64 payload bytes.  The packets are forwarded to TLK100 receive port.

Conditions observed:  (waveform attached)

  1. MII RX CLK not toggling during Inter Packet Gap (IPG). During IPG (from falling edge of the RX DV to rising edge of the RX DV), noticed that MII RX CLK is high for ~6us. Is this expected behavior?
  2. Also, MII RX CLK was high for ~400ns soon after the falling edge of the RX DV.  Is this expected behavior? 

Any help would be appreciated.

  • Hi Daniel,

    The behavior you described is expected for 10BT data reception.  

    The MII_RX_CLK is switched from Free Running clock to recovered clock  within the reception of the packet.

    1. Start of packet reception:  16 bytes of preamble are not delivered to the pads (only SFD and payload does) and in this period RX_CLK is switched to be the Recovered Clock.
    2. End of packet reception: upon falling edge of RX_DV, clock is switched back to Free Running, so it stay High till the next rising edge of Free Running Clock.

    Regards,

    Yaniv

  • Hi Yaniv,

    Thanks for the clarification!

    Thanks,

    Daniel