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TSB12LV32 TBS41BA3 Port Enable/Disable issue

Other Parts Discussed in Thread: TSB12LV32

We have a system using TSB12LV32 & TBS41BA3A.  There are three Nodes wired together in a loop (i.e. Node 1 port 1 wired to Node 2 port 0, Node 2 port 1, wire to Node 3 port 0, Node 3 port 1 wire to Node 1 port 0)... port 2 one node is connected to a firespy for debugging purposes.  Port 2 of the other 2 nodes are not connected to anything.

When you power up the sysetm... the system self identifies and one of the connections ends up loop disabled (as expected).  As part of a system test, we perform the following (one node at a time)

#1 Disable Port 0, Verify data is being received on Port 1, then re-enable port 0  (the disable is executed via a phy register)

#2 Disable Port 1, Verify data is being received on Port 0, then re-enable port 1 (the disable is executed via a phy register)

The intent of this test is to verify that all physical wires exist in the system (otherwise you may never know that one of the three wire connecting the 3 nodes is broken).

When we do this, the bus doesn't always reconfigure properly after the enable.

Any clues?

Thx

Steve

 

  • On the enable, a closed loop is created, Firewire topology must be acyclic.  A closed loop will prevent the tree identify process from completing.

    Regards,

    Undrea

  • When we reneable the port,  wouldn't that cause a bus reset and cause the phy to go through another  tree identification process where one of the connections would end up port disabled again (just like on power up)? 

    I quess we could try the following sequence:

    #1 Disable Port 0, monitor for data on port 1

    #2 Disable Port 1, Enable Port 0, Monitor for data on Port 0

    #3 But now how do I get port 1 enabled again but in loop disable mode

     We also tried issuing a short bus reset after reset after each port enable and disable, but that didn't help.

    Need  a mechanism to determine if all wires are connected.

     

  • What Undrea is saying is that loop testing is done only after a physical connection is made; disabling/enabling ports doesn't change this. So when you manually disable/enable ports, you override the decision made by the loop test, and you have to ensure that the topology is always correct.

    But for your intended tests, you don't actually need to disable ports. When a port becomes connected, loop testing is done only after both speed negotiation and training have completed. Therefore, if any port is reported as being in the loopDisable state, you know that there exists a loop, i.e., that all wires are there and do work.