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TL16C754C Receive Interrupt

Other Parts Discussed in Thread: TL16C754C

Hi,

We are using TL16C754C device. To get interrupt for every four bytes we are modifying the register TLR = 0x04 as per data sheet sequence.

But, we are observing that the interrupt is getting generated for each and every byte.

Any other registers do I need to write to get interrupt for every four bytes?

What for MCR[3] is used? To receive interrupts do I need to set this bit?

Regards,

GSR

  • HI

    MCR[3]  : when 0-> it fource the IRQ signal to high impedance, So please set it to '1', futhermore please check the external pin  INTSEL

    it can also affect the IRQ signal. please see datasheet for more details (the pin description section).

    regrading TLR configuration: the configurable value is multilply by 4 see table 21 in the datasheet.So 4 byte require to set the register fileld to value 1

    Assaf .

     

     

     

  • Hi Assaf,

    Thank You for your time and the reply.

    I was setting TLR[3:0] but I have to set TLR [4:7] to get interrupt after every 8-Bytes.

    So, say for example, I receive only 7-Bytes in that case the controller will raise the interrupt after  it receives one more byte or will it be able to raise for 7-Bytes?

    Regards,

    GSR

  • Hi

    The interrupt will be propagated only if you get 8 frames/bytes or  more.

    If you received only 7 bytes and then a long pause(no new frames), you will get a time out interrupt.

    enabling you to extract the  remaining data.

    Assaf

  • I have configured TLR[7:4] to receive more than 4 bytes i.e. TLR[7:4] is set to either 2 or 4.

    But, I am seeing that the data read is 5-Bytes in ISR on every interrupt. Why is it so?

    Also the interrupt is getting generated twice once it prints 0xC1 and immediately it shows 0xCC. (When IIR shows 0xC1 why am I seeing the HW Interrupt)

    Regards,

    GSR

  • I understood why the 0xC1 value is gettings printer. The OS Layer is calling the GetIntrType function to know the reason for the interrupt.

    The Upper layer is calling this function until there are no more interrupts.

    Now, I will debug why the interrupt is coming for 5-Bytes even when I configured to generate interrupt once for every 16-Bytes.

    Regards,

    GSR

  • Hi

    please note that 0Xc1( IRR register) means no interrupt exist.

    can you elborate on your system/sowfware sequnce?

    if you configure the TLR[7:4] to trigger interrupt only after  8 byte and you get an interrupt after 5 byte it can occurs due to

    1) time out interrupt

    2) rewrite IER register - will genereate an irq

    Assaf

     

     

  • Hi Assaf Avram,

    Thank You for your time.

    I understand that 0xC1 means there is no interrupt.

    In our OS the interrupt service thread is calling a function to know the cause for interrupt until the function returns that there are no more pending interrupts.

    One observation is we are using a 16MHz crystal. With 4800 baudrate I see that interrupt is getting generated after 16-Bytes but at 9600-baudrate the interrupt is getting generated for every 5-Bytes. With 16MHz crystal there is a baud rate error.

    Regards,

    GSR

  • Hi

    Can you please elaborate on "With 16MHz crystal there is a baud rate error"?

    please note the RX trigger can be configure from two registers TLR[7:4] or from FCR[7:6]

    you wrote that you configure the TLR but be aware that before written to the TLR the following bits must be asserted

      1.EFR[4] Enable Enhanced function must be enable

     2.MCR[5]:TCR and TLR enable must be enable

    if the two are not configure than the data will not be written in to the TLR register.

    if the TLR register has zero value than the FCR  bits [7:6] will  control the trigger level.

    if the above field (FCR[7:6]) is configure to "01" it can explain why you are seeing IRQ after 5 bytes 

    Assaf

     

  • Hi,

    When we use 16MHz crystal the baud rate for 9600 would be 16000000 / (16 * 9600) = 104.167. But we are programming a value of 104. That means actual baud rate with 104 value we get is 9615.38. So that is why I made statement that there is a baud rate error.

    Yes we are setting MCR and EFR as you said before setting TCR and TLR registers.

    Regards,

    GSR