We have an embedded system that outputs an lvds stream at 75 mhz. Only three signal pairs are output, CLK+1 bit DATA+DAV. We have been using a custom board with fpga for deserialization into a 16 bit parallel output then into an NI 6561 PCI interface in a windows pc.
We're seeking a solution to simplify the system. Does anyone have any suggestions?
One possibility that looks interesting is the TSW1250EVM, but it seems to insist on its own lvds clock.