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LVDS 200Mbps 0.3m unshielded twisted pair ribbon feasible?

Other Parts Discussed in Thread: DS90LV047A

Hi all,

I read this document http://www.ti.com/lit/an/slyt172/slyt172.pdf which seems to suggest that 50 and 100Mbps are more than feasible over a cable length of up to 3m.  I tried to extrapolate the results to a 200Mbs SPI connection over a cable length of about 0.3m and I think it will work with careful attention made to layout and timing constraints to take into account both maximum skew and jitter.

The document gives measured jitter but it doesn't say explicitly whether the results are pk to pk or rms (I hope pk-pk!).  Also I don't quite understand the results for the 3m cable (not that it matters that much for me) since the total jitter seems to be actually less for 100Mbps than for 50Mbps and the way it is shared between the source, driver, cable and receiver seems a little inconsistent somehow.

In my application I will be using matching LVDS Tx and Rx devices with built in LVDS terms and matched cable and PCB differential Zo.  Pairs will be separated by pairs of GND wires.

Could anyone out there share their own experience with anything similar?

Many thanks,

Dave.

  • Greetings -

    I would expect basic LVDS communication to work well at 200Mbps / 0.3m for most LVDS parts.  See DS90LV047A Quad LVDS driver datasheet for a example curve on data rate vs cable length.  As with all interfaces, take care with layout, stub length and isolation.  LVDS supports +/-1V common mode range.  The GSSGSSG layout is good for isolation.  I am not familar with the report you sited, unaable to comment upon it.

    John Goldie

    DPS APPS / SVA

  • Hello John,

    Thanks for pointing that out.  It gives me some extra confidence.

    Regards,

    Dave

  • Hello John:

    I came across this issue when searching for information about allocating ground signals on a high-density connector with 96 pairs of non-serialized LVDS signals. Could you help me with the following question?

    Since in a differential interface the return path is provided by the complimentary pin of the driver output, why is the GND signal needed?

    I have seen LVDS interfaces with a GND signal alternating every pair of LVDS signals up to a GND pair every four to eight pairs of LVDS signals. Could you provide me with some guidelines to determine the minimum number of GND pins needed? The maximum data rate in this application is in the order of 50Mhz.

    Thanks,

    Oscar Medina.

  • Greetings -

    Correct, most of the current is odd mode (equal and opposite), however due to mode conversion and other in-balances, some is even mode and requires the GND connection.  The Ground also helps to give isolation and sets the impedance as well.  Some connectors are optimized  and are well suited for differential signalling.  Matrix connectors can also be used, and usually use the GSSG type layout as you note.  Please note I will away and unable to follow up, but I am sure others will fill in as needed.  Best Regards;

    John Goldie

    LVDS Applications 
    NSC & TI