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DS92LV16: Status of pll for serialization

Andrea Romboli
Prodigy 20 points
Other Parts Discussed in Thread: DS92LV16, DS15BA101, DS15EA101

Using the DS92LV16 just for serialization only seems very easy to implement and just with few control pins and without REFCLK. But, unlike the deserialization section, there isn't any feedback status pin on the pll for trasmission, so how can I be sure that the serialization run properly? I'll not have any feedback status from the other DS92LV16 in deserialization configuration that will receive the data.

I will use this device with a cable driver DS15BA101 to drive 20m of cat6 cable. The receiver will be another DS92LV16 with ahead a DS15EA101.

Perhaps connect the +/-RI to +/-DO and monitoring the LOCK? But with the deserialization enabled, the power consumption will double and will be need to supply the REFCLK too.

Thank you

Andrea

  • 0
    TI__Mastermind 43795 points

    Andrea,

    I agree you could use an DO to RI connection to monitor the serialization process.  What is the TCLK frequency?  I think with careful routing and a very short interconnect to the DS15BA101 input this is a potential solution.  By not connecting the ROUT[15:0] the power addition will be minimized.  Also put an option on the schematic to control the REN pin to either the LOW or HIGH state. This pin disables the receiver outputs, but still allows the PLL to LOCK.

    The REFCLK could be supplied by splitting the TCLK signal and driving both the TCLK and REFCLK inputs.  I would recommend performing an IBIS simulation to ensure good signal integrity on both clock inputs. 

    Regards,

    Lee