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DS92LX1622/21 serdes

brian moore
Prodigy 100 points
Other Parts Discussed in Thread: DS92LX1621

Can this chipset operate as a basic, no-frill serdes WITHOUT a microprocessor and I2C conrtol bus present, using its default register values?  What if, instead of a twisted pair connection between SER and DES, we use an optical path with a fiber optic transmiiter connected to the SER and a FO recever feeding the DES? There would then be galvanic isolation between the SER and DES and also the communication between SER and DES would be ONE WAY. Would the chipset still function as a no-frills serdes?

  • 0
    TI__Expert 7395 points
    Hi Brian,
    Yes, the DS92LX1621/1622 chipset can operate as a stand-alone SERDES pair with default registers. The only configuration that will be needed is setting the Mode Select pin on each device. Tie both the M/S pins (SER pin 8 and DES pin 40) to High. Please also note all the control and configurations defaults on register 0x03[bit 0] match your upstream/downstream devices.
    Dac Tran
    SVA / APPS
  • 0 in reply to Dac Tran
    Prodigy 100 points

    Thanks for replying. Just to verify, the chipset does not need connectivity of the back channel to function (we want to connect the SER to the DES via a one-way optical link). And why are data channels 14 and 15 called Hsync and vsync? Do they have different characteristics than channels 0 to 13?  Do they have special restrictions? What if I wanted to use some other channel for sync, or 14 or 15 for non-sync signals?

    Regards, Brian

  • 0 in reply to brian moore
    TI__Expert 7395 points

    Hi Brian,

    Yes. Using the settings described above, the SerDes will be only configured as a point-to-point interface (w/o the bidirectional control channel). The Vsync and Hsync signals are treated the same as general parallel data I/O's; so there's no specific sync requirement for channels 14 and 15.

    Dac Tran 

    SVA / APPS