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DP83640 serial interfaces electrical spec

ralph vernile
Prodigy 110 points

Other Parts Discussed in Thread: DP83640

My question is about the DP83640 electrical specs, concerning the serial interfaces:  Both the ‘83640 and the transceiver state that these interfaces are PECL-compatible.  But It’s unclear what the required voltage levels are at the DP83640.  My application needs 100Mbps, FX mode.  The transceiver I’m using is an Avago HFBR-57E5APZ.

See the DP83640 data sheet, page 102:  “DC Specifications”

  • The 100M-FX transmit voltage is 0.3V/0.5V/0.93V min/typ/max for the PMD Output pair.  Is this the differential voltage or common-mode voltage?  (Transceiver requires 0.5V min differential input voltage)
  • The input side seems to be okay but I’d like you to confirm:  The DP83640 signal detect turn-off threshold (below) is 200mV min pk-pk, which is differential voltage.  (Transceiver output is 0.4V min diff V)
  • The “100BASE-TX Signal detect turn-on threshold” of 1000mV diff pk-pk does not apply to 100M-FX mode? (transceiver output is 2000mV pk-pk & would exceed this)

 

  • 0
    TI__Mastermind 31600 points

    The 100M FX transmit voltage shown in the datasheet is single-ended.

    The signal detect thresholds shown in the datasheet are for 100Base-T.  They are not applicable for FX. 

    The transceiver outputs a TTL Loss of Signal while the Phy expects an LVPECL Signal Detect input.  The LOS signal will need to be inverted and level shifted.

    Please see the DP83640 EVK schematic for the recommended connections between the Phy and the transceiver:

    http://www.ti.com/litv/pdf/snlr007

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 110 points

    Patrick,

    I'm not sure we're talking about the same SD input.  I'm referring to a single-ended input, pin 27 -- LED_SPEED/FX_SD.  What inputs are you referring to that require differential LVPECL?  I have the signal detect open-drain output from the HFPR-57E5APZ  transceiver pulled up to 3.3V with 4.7kohm.  This is a direct input to pin 27 of the DP83640.  The only signal detect input I see that senses differential is the PHY's internal signal detect based on the input levels of the PMD input pair.  What is the input level required on the single-ended FX_SD input pin 27?

    Your schematic uses a different transceiver that has different output voltage specs.  However, it's also a single-ended signal and not LVPECL.  It has a 130 ohm pullup and 80 ohm pulldown.

    If the spec on the 100M FX transmit voltage is single-ended, then what are Voh and Vol?  Only one voltage is specified as min/typ/max.  Is the specified 0.5V min input differential specified at the transceiver's LVPECL input going to be satisfied? 

    Thanks.

    Ralph

  • 0 in reply to ralph vernile
    TI__Mastermind 31600 points

    Ralph,

    I wanted to post the results of our phone conversation from yesterday afternoon to confirm that we have closed the open questions.

    The fiber transmit and receive pins are differential and are designed to be LVPECL compatible.  In the case of the fiber transmit specification, the minimum output levels from the device should be 0.3V single-ended, 0.6V differential.  This signaling should meet the requirements of the fiber transceiver inputs.  Typically, the transmit signaling will be closer to 0.5V single-ended, 1.0V differential. 

    The FX_SD input is a single-ended receiver that is designed for signals swinging from VDD - 1.47V to VDD - 1.16V.  The input is active high.  That is to say, it is designed to detect when the fiber transceiver sees a valid signal.  Therefore, in order to operate correctly with a fiber transceiver that outputs a loss of signal (LOS), the fiber transceiver output will need to be inverted.

    Since the Avago HFBR-57E5APZ outputs an LVTTL level Loss of Signal (LOS), level shifting and inversion will be required.  Based on our discussion, the best way to accomplish this on your board will be to invert the LOS via a CPLD on your board and then drive the FX_SD input using 3.3V CMOS levels.  The signal detect receiver can accommodate these levels.  To avoid any issues with the drive levels, it would be best to remove the 130 Ohm / 80 Ohm termination pair typically used for the FX_SD pin. 

    Please let me know if there are any remaining open questions or anything that requires further clarification. 

    Patrick