TUSB9261 input clock jitter requirements for USB 2.0 high speed

Hi Brian,

the image specifies the horizontal and vertical eye pattern opening over a 480 bit time sliding window over the duration of a packet.
Thus, for example, a high-speed receiver within a function must reliably recover data with a peak to peak jitter
of 30%, measured at its B receptacle

It is a recommended design guideline that a receiver’s BER should be <= 10^-12 when the receiver sensitivity requirement is met

Also, the entire input jitter requirements are defined on the section section 7.1.15 of the USB2.0 specification (usb_20.pdf within http://www.usb.org/developers/docs/usb_20_102512.zip)

Regards.

Thanks, Diego.  What I'm looking for is a corollary to the specifications in Table 6-1 (Oscillator Specification) of the TUSB9261 data sheet that would apply to a USB2.0 implementation, rather than a USB3.0 implementation:

Thanks,

Brian.

Hi brian,  please attach the image, because i can not see it 

Regards,
Diego 

Sure, here you go.  Let me know if this didn't work.

Hi Brian,
Yes it works, because as you can see in the image below, the input clock is used by the device in order to generate all the necessary clocks ( used for the SATA, USB2 and USB3 drivers) therefore, only the device is dealing with all the USB requirements and you have to take care of meet the chip requirements.

Regards,
DIego