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RX_ER pin on Ethernet PHY DP83848C

Other Parts Discussed in Thread: DP83848C

Is RX_ER signal mandatory for MII interface?

Based on IEEE 802.3, RX_ER signal could be handled by  Reconciliation sublayer. that "produces a result that is quarantted to be not eqaul to the CRC result". so RX_ER seems mandatory on MII to inform MAC the receive error.

However, RX_ER signal seems NOT mandatory as what mentioned in DP83848C datasheet :"This pin (RX_ER) is not required to be used by a MAC, in either MII or RMII
mode, since the Phy is required to corrupt data on a receive error."

So, how MAC layer to handle receive error if RX_ER pin of DP83848C is not connected to MAC inside of processor? thanks for your support!

Best regards

Qing SHAO

  • Hi Qing Shao,

    The words :'This pin (RX_ER) is not required to be used by a MAC, in either MII or RMII mode, since the Phy is required to corrupt data on a receive error."

    which the RX_ER is meaning that older designs using the DP83846 may use the TX_ER pin. This signal allows the system MAC to force DP83846 to deliberately corrupt the transmitted packet by inserting bad symbol codes. A similar function can be accomplished by having the MAC signal the PHY to stop transmission midpacket. By stopping mid-packet, the receiving node will interpret the packet as having a bad CRC. Upper layers can then decide to receive or reject the packet in question. Since the function on the TX_ER pin can be more easily attained with the latter method, the TX_ER pin was not included on the DP83848. If the TX_ER pin is used as an input to any device, the pin should be pulled low to ensure that it does not float.

    Here the PHY shall provide RX_ER as an output according to the rules specified in IEEE 802.3u [2] (see Clause 24, Figure 24-11 - Receive State Diagram). RX_ER shall be asserted for one or more REF_CLK periods to indicate that an error (e.g. a coding error or other error that a PHY is capable of detecting, and that may otherwise be undetectable by the MAC sublayer) was detected somewhere in the frame presently being transferred from the PHY. RX_ER shall transition synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RX_ER shall have no effect on the MAC.

    Mister Lei

    11/8/2012

  • Hi Mr. Lei,

    Thanks for your reply!

    Sorry but I'm not sure if my understanding is correct and still confused about RX_ER signal.

    Do you mean that RX_ER is necessary for DP83848C? And the words 'This pin (RX_ER) is not required to be used by a MAC, in either MII or RMII mode, since the Phy is required to corrupt data on a receive error." is for DP83846 only due to TX_ER available on it?

    Would you mind to let me know your phone number or just call me at +8621 24188828 in Shanghai? In this case, we may discuss by phone? thanks again!

    Best regards

    Qing SHAO

  • Hi Qing Shao,

    YES.  But it is my humble opinion according to the datasheet.  Also hope for better mind.

    Your company is STMicroelectronics. I do not think it is the right situation under which I could add further comments considering competition relationship between our companies. I think you can post your further requestion with your  Annual Production Informations on this forum, discuss will be continue...

    Thank you.

    Mister Lei

    11/12