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PHY not behaving as expected (DP8384BYB)

CATEGORIZATION ERROR:  This question has been mis-categorized as a "DaVinci Video Processor" question but is actually an Enternet connectivity problem using a standalone TI part, the DP8384BYB.  The author apparently does not have enough privileges to fix the categorization.

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I have a new hardware design that uses a DP8384BYB and is not behaving as expected.  I also have two other designs with the same schematic and controller software that do appear to work. -- I've been troubleshooting this design for a couple of days now and I am at a loss for what is going wrong on this new board...

I've attached a schematic and probed all of the pins (shown in the table below) and would really appreciate some suggestions.

Pin Name Pin Number Working Board Behavior Non-Working Board Behavior
TX_CLK 1 25MHz clk (max: 3.9V, min: -0.8V) 0V
TX_EN 2 0V 0V
TXD_0 3 0V 0V
TXD_1 4 0V 0V
TXD_2 5 0V 0V
TXD_3/SNI_MODE 6 0V 0V
PWR_DOWN/INT 7 3.3V 3.3V
TCK 8 3.3V 0V
TDO 9 0V 0V
TMS 10 3.3V 0V
TRST# 11 3.3V 0V
TDI 12 3.3V 0V
RD- 13 3.3V 3.3V
RD+ 14 3.3V 3.3V
AGND_1 15 0V 0V
TD- 16 3.3V 3.3V
TD+ 17 3.3V 3.3V
PFBIN1 18 1.8V 0.8V
AGND_2 19 0V 0V
RESERVED_1 20 3.3V 3.3V
RESERVED_2 21 3.3V 3.3V
AVDD33 22 3.3V 3.3V
PFBOUT 23 1.8V 1.75V
RBIAS 24 1.2V 1.2V
25MHZ_OUT 25 50MHz (max: 4.1V, min: -0.9V) 0V
LED_ACT/COL/AN_EN 26 3.3V 3.3V
LED_SPEED/AN1 27 0V 1.5V
LED_LINK/AN0 28 3.3V 3.3V
RESET_N 29 3.3V 3.3V
MDIO 30 3.3V 3.3V
MDC 31 0V 0V
IOVDD33_1 32 3.3V 3.3V
X2 33 50MHz (max: 1.3V, min: 0.9V) 50MHz (max: 1.6V, min: 1.1V)
X1 34 50MHz (max: 4.0V, min: -1V) 50MHz (max: 3.9V, min:- 0.9V)
IOGND_1 35 0V 0V
DGND 36 0V 0V
PFBIN2 37 1.7V 0V
RX_CLK 38 25MHz (max: 4V, min:-1V) 0V
RX_DV/MII_MODE 39 0V 3.3V
CRS/CRS_DV/LED_CFG 40 0V 0V
RX_ER/MDIX_EN 41 0V 0V
COL/PHYAD0 42 0V 0V
RXD_0/PHYAD1 43 0V 0V
RXD_1/PHYAD2 44 0V 0V
RXD_2/PHYAD3 45 0V 0V
RXD_3/PHYAD4 46 0V 0V
IOGND_2 47 0V 0V
IOVDD33_2 48 3.3V 3.3V

   

  • PFBOUT must be shorted to PFBIN1 and PFBIN2.  PFBOUT provides a 1.8V supply that is regulated down from the 3.3V supply inside the device.  PFBIN1 and PFBIN2 use that 1.8V supply to power circuitry inside the Phy.  Without these connections, the Phy will not operate correctly. 

    Based on the schematic, it does not appear that PFBOUT is connected to PFBIN1 or PFBIN2.  If that is the case, I am not sure how the other boards work.  Perhaps the connection was not ported forward to this schematic?

    Patrick

  • Patrick -  I owe you a drink.  It seems the common net was accidentally dropped from the schematic.  I've tested your observation by adding a couple mag-wires and it appears to have resolved the problem.  Thank you.