SerDes-DS90UB913Q/DS90UB914Q

rajesh ravnikar

Hi Ti ,

I'm using DS90UB913Q/DS90UB914Q in one of our designs .

I have configured the Ser/Des pair for 10bit video data with upto 100MHz pixel clock .But as I connect the LVDS cable between the Ser\Des pair I'm seeing the 50MHz pixel clock output coming as a default frequency from the De-Serializer even when there is no camera recording .Once the record is initiated there will be change in pixel clock frequency.

Is it the way the De-Serializer is expected to work as I do not find this information in the datasheet .

Thanks for the reply .

Best Regards,

Rajesh N

over 13 years ago

0 Mark Sauerwald88474 over 13 years ago

TI__Genius 13475 points

Hello Rajesh

The serializer has an internal oscillator, and if there is no input clock, then it will operate using this clock - at a rate of about 50MHz, so what you are seeing is what would be expected.

Mark

0 rajesh ravnikar over 13 years ago in reply to Mark Sauerwald88474

Prodigy 180 points

Hello Mark ,

Thanks for the reply .

I am here talking about the De-Serializer pixel clock output , not the serializer .

When an LVDS cable is connected between the Ser-Des pair the pixel clock output from the De-Serializer will be a default 50MHz clock even though when there is no camera recording.

Is it expected ??

Best Regards,

Rajesh N

0 Mark Sauerwald88474 over 13 years ago in reply to rajesh ravnikar

TI__Genius 13475 points

Yes, the transmitter uses it's internal clock to establish the serial link, and the receiver recovers this clock and provides it as the pixel clock output - it should be at ~50MHz.

Once an input to the serializer is connected, that will override the internal clock, and you will see the source clock being recovered and presented at the deserializer pixel clock output.

0 Ryan Bailey over 13 years ago in reply to Mark Sauerwald88474

TI__Intellectual 2855 points

If you do not want this 50MHz clock output, you may disable the output by manipulating the output enable (OEN) through the control registers. See reg_0x1F[7:6] on page 38 of the datasheet for more details.

0 rajesh ravnikar over 13 years ago in reply to Mark Sauerwald88474

Prodigy 180 points

Thanks you Mark for your valuable inputs.

Best Regards,

Rajesh N

0 rajesh ravnikar over 13 years ago in reply to Ryan Bailey

Prodigy 180 points

Thanks Ryan for your inputs .

Best Regards,

Rajesh N

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