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External loopback between the pins TD+/TD- and RD+/RD- for DP83620

Other Parts Discussed in Thread: DP83620

Is it possible to give a programmable external loopback feature for pins TD+/TD- and RD+/RD-  of DP83620 chip while operating in 100BaseFX mode? What kind of circuit may be used for this which can either select an external loopback to loop port transmit data to receive externally, or make the transmit/receive connection through to a fiber optic module by using a logic control signal?

Regards,

  • You might be able to use a LAN/Network Switch to multiplex the data.  The devices that I have in mind are not switches in the sense of routing and buffering packets.  Rather, they operate more like a mechancial relay.  I believe there are some TS3Lxxxx and TS5Lxxx devices in the TI portfolio that would be suitable.

    What is the end goal of this connection?  Why do you need to loop the fiber transmit signaling back to the receiver?

    Patrick

  • This sort of loop may be needed if two DP83620 are used to make a full duplex 10BaseFX link, one only for 100BaseFX  receive and other for 100BAseFX transmit. A single Phy allows an internal loop, but not across two phy. You may ask why use two phys? Well the DP83620 device uses three clock domains(transmit, receive and crystal/osc clock), but does not allow transmitter clock to be independent of crystal/osc which is also needed for receiver clock recovery and chip operation. By using two phy I can separate out the transmit and receive clock domains entirely, but that will not allow loopback of transmit to receive acros two chips, hence an external loop may be needed. This will of course leave half of the two phys  unused. I may of course try to achieve internal loop by looping MII TX signals of the transmitting chip to MII RX signals of the receiving chip externally but it needs both clock and frame synchronization between the two.  If there is no frame synchronization I need a FIFO. 

    Hemant