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Problem with 3G-SDI RX

Suresha N S
Expert 1070 points
Other Parts Discussed in Thread: LMH0344, LMH0303, LMH0384

Hi ,

We are using LMH0303 & LMH0344 in the TX and RX paths of SDI respectively.

SDI TX is working without any issues for all modes (SD-SDI , HD-SDI , 3G-SDI & Dual stream SDI ). We have verified this using SDI Monitor.

Although SDI RX is working fine for SD-SDI & HD-SDI , we are facing issues with 3G-SDI RX .

Due to unavailability of SDI sources , we are using output of one board as the input to other board . With this setup resolution of incoming data is varying continuously.

We tried using LMH0384 (footprint compatible with LMH0344) & with this performance is improved , but the input gets corrupted after 15-20 minutes .

We also observe that this corruption is much more when the SDI TX & RX is operated simultaneously.

Is there any specific things in equalizer we can look into ? Should we increase the drive strength from LMH0303 since this is used as a source ?

Thanks & Regards ,

Suresha.N.S.

  • 0
    TI__Genius 13475 points

    The LMH0344 expects the launch amplitude of the signal to be 800mV p-p into the 75Ohm cable, changing the launch amplitude from this level will adversely affect the performance of the equalizer.

    The equalizer has very high gain, to be able to recover a signal after a long length of cable, therefore it is important that the input to the equalizer (the path from the cable to the LMH0344 input) not be layed out in such a way that it is susceptible to interference.

    How are you determining if you have corrupted inputs - are you looking at the received CRCs?  - How is the serial data being analyzed?

    Mark

     

  • 0 in reply to Mark Sauerwald88474
    Expert 1070 points

    Thanks for your reply .


    With some other cable we are not facing any issues with the 3G-SDI RX alone.The problem is still present when we use 3G SDI RX & SDI TX simultaneously.

    The incoming SDI data is received by FPGA .We are observing CRC errors in the received data in the above use case , thus output video getting corrupted. 

    To isolate the problem from FPGA we tried loopback from SDI equalizer ( LMH0384) to SDI Driver (LMH0303) . This case works fine for HD & SD modes . We are not able to see any display in case of 3G .

    Is this use case is valid ?

    Thanks & Regards , 

    Suresha.N.S.

  • 0 in reply to Suresha N S
    TI__Genius 13475 points

    Have you looked at the system with various different lengths of cable? - Do you only see the CRC errors with short cables, or long cables?   What type of cable are you using.  

    It sounds to me as though you may have crosstalk between your output channel and the input channel - if this is the case, the problem should be worse with long cable, when the equalizer sets itself to a higher gain mode.    You could also determine if this was the case by disabling the cable driver on the board and seeing if the CRC errors go away.

    Are you able to observe the waveforms at the output of the cable driver and/or the input to the equalizer? - If there are impedance mismatches causing reflections then this could make the situation worse.

     

  • 0 in reply to Mark Sauerwald88474
    Expert 1070 points

    Thanks for your suggestions .

    We removed the series capacitor on the output side of the SDI driver & observed that there was no corruption in the RX data . We also directly connected the SDI driver output to the cable (By doing this , we isolated the PCB trace path ). In this case also we observed that the both input & output are working properly. Thus as you suggested this must be a cross-talk issue .

    We have a air-gap of 11-mils between SDI output & SDI input single ended traces with 5.8 mils width giving 75E impedance. I have attached the snapshot of the layout for your reference . 

    Is this air gap sufficient ? Can we expect any interference with this layout design ?

    Thanks & Regards ,

    Suresha.N.S.