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DP83630

Other Parts Discussed in Thread: DP83630

We need to send time from our device to PC by Ethernet. PC sends request and our device sends time in reply. Our device has a precision timer. Fidelity of time should be better then 1ms. We’d like to use DP83630 Ethernet controller in our device. We'll use 25 MHz crystal and MII interface. 

QUESTIONS:

         1. Pease, report, how can we set 48-bit MAC-address of our device? 

        2. If we strap GPIO1 to "high", then 25 MHz must be on CLK OUT constantly? If we reset DP83630 by RESET input, then this reset don't interrupt operation of this CLK OUT?  I 'd like to know :  can we use this CLK OUT for synchronization of microcontroller i.e to use one  crystal resonator for  DP83630 and microcontroller?

        3. How can we use “Packet timestamp for clock synch”?

  • Could you clarify your question on the MAC address?  Are you referring to the Phy Control Frame and Phy Status Frame configuration in the PCFCR and PSF_CFG0 registers, respectively?

    The CLK_OUT pin can be used for several functions - a PTP clock, an RMII clock, a synchronous recovered clock, or a buffered version of the X1 reference clock.  Are you intending to use the clock as a buffered version of the X1 reference clock? 

    The best resource for information on support for IEEE 1588 PTP packet timestamping and clock synchronization is the Software Design Guide (SDG) and C Software Reference.  This can be downloaded from:

    http://www.ti.com/litv/zip/snlc036

    The SDG should provide you with a good regarding what is required.

    Patrick

  • Dear Patric!

    Thank you.

    1. Concerning MAC address: Does DP83630 have unique 48-bit address for the network Ethernet? Or do we need to acquire the address separately?

    I give an example: Miсrochip issues a special memory chips, which has a unique 48-bit address (to work with Ethernet Controller made Miсrochip).

    2. Please, explain, can we use packet timestamping and clock synchronisation in MCU type Cortex-M4F? Is it possible to do it without installing the Operating System (Linux like) on MCU? 

    3. We'd like to use MII interface between  DP83630 and MCU. We're going to use 25 MHz crystal with DP83630. Please, answer, how do we need to synchronize MCU? Can we use CLK_OUT pin of DP83630 and feed this frequency to X1 input of MCU? Or can we use own crystal with MCU, and use other frequency, for example 16 MHz?

    Yours sincerely

    Vladimir Naumenkov

    www.agat.by

  • Vladimir,

    For the network MAC address, you will need to acquire the address separately. 

    I have shared your question about using a Cortex-M4F MCU with our MCU team.  I will let you know what they recommend.

    For MII, the transmit (TX_CLK) and receive (RX_CLK) MII clocks are sourced by the Phy.  In my experience, an additional 25MHz clock from the Phy to the MAC is not necessary.  Any additional clock requirement would depend on the MCU MAC.  The DP83630 can output a buffered version of the X1 reference clock using the CLK_OUT pin if needed.

    Patrick

  • Dear Patrick,

    Thank you very much!

    Yours sincerely,

    Vladimir Naumenkov  

    www.agat.by

  • Vladimir,

    I believe you can find examples of IEEE 1588 implementations in Cortex-M3 and Cortex-M4F MCUs, but I have not had any experience with these implementations so I cannot make any recommendations.  I would suggest following up with specific MCU vendors to understand the MCU implementation and any software considerations.

    Patrick

  • Dear Patrick!

    Thank you

     Please, help me  to clarify the next: for using packet timestamping and clock synchronisation we can communicate between DP83630 and PC, or on the both ends of the link must be DP83630s ?

    Thank you

    Yours sincerely

    Vladimir Naumenkov

  • Vladimir,

    The DP83630 provides hardware support for packet timestamping as well as synchronous clocking and I/Os.  This functionality requires a PTP stack running at a layer above the Phy (in an MCU / processor or in software).  The 1588 partner for the DP83630 is not required to be a DP83630, but the partner will need to be running a PTP stack. 

    Patrick

  • Dear Patrick!

    Thank you.

     Yours sincerely,

    Vladimir Naumenkov