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LMH0340/0341 synchronization issue

Nizam AYYILDIZ
Prodigy 10 points
Other Parts Discussed in Thread: LMH0340, LMH0341, LMH0344

Hi,

I have implemented a circuit similar to shown in http://www.ti.com/lit/an/snla122/snla122.pdf Figure1. I apply an 8-bit counter, which is 8B/10B encoded to the LMH0340. At the recevier side, I decode the parallel output of the LMH0341 via 8B/10B decoder again. However, I have to apply several RESETs to see that the correct data pattern on the FPGA. The number of RESETs is totally random. I have also tried applying only 0xBC (K28.5) caharacters continuously, and I saw the same result. The data alignment seems to depend on RESET timing. Could you please tell me a deterministic way to synchronize data correctly at the LMH0341 side?

Thanks & Regards,

Nizam AYYILDIZ 

  • 0
    TI__Genius 13475 points

    Hello Mr Ayyildiz

    The LMH0340 and LMH0341 Serializer/Deserializer pair were intended for broadcast video signals, where the word alignment would be done within the FPGA.   If you connect the deserializer to the serializer directly, the word alignment at the output of the deserializer is completely random, so doing as you are, you will need to reset (on average) 5 times before the word alignment hits the same as what your FPGA is expecting.

    If you enable the 8b10b decode within the LMH0341, then it will find the word alignment itself, and will do the 8b/10b decode, so then you should see the counting pattern at the output of the LMH0341, alternately, you can set up a barrel shifter in your FPGA, and find the proper word alignment within the FPGA.

     

  • 0
    Prodigy 190 points

    Hi

    Myself jetendra singh Hyanki i am using SDALTEVK development board and using FPGA IP of TI.

    design is working fine but when i made a custom board the part is not working. In custom board I am not

    writing anything via SMBS interface. I want to know that wether this part is required to configure.

    If yes what should i write? because from data sheet i am not getting anything.

    regards

    J S Hyanki

  • 0 in reply to jeetendra hyanki
    TI__Genius 13475 points

    The LMH0340 and LMH0341 have many options for different types of functions which can be configured via the registers which you can access via the SMBus interface, but we have set the defaults of those registers such that with no programming, the device should work in most applications.    When you say 'the part is not working", what is it doing, or not doing?  Are you referring to the LMH0340 or the LMH0341?

     

  • 0 in reply to Mark Sauerwald88474
    Prodigy 190 points

    Hi Mark,

    It means that in dev board the register setting of part is in default condition.

    I have made circuit equivalent to schematic of development board.

    In my board part is not responding.

    in LMH0340 input signal of LVDS DATA[4:0] and CLK is going but lock condition and SDI out from part is not comming which shows that part is not responding.

    in LMH0341 SDI input is going but output LVDS data and LVDS CLK is not coming from part so it also shows part is not respomding.

    regards

    js hyanki

  • 0 in reply to jeetendra hyanki
    TI__Genius 13475 points

    Thank you for the additional information Hyanki-san.

    The LMH0340 and LMH0341 are intended for video, and as such will only work at video data rates.   One of the first things that we should check is that the PLLs in both the LMH0340 and LMH0341 are locking appropriately.

    Please verify the frequency of the CLK going in to the LMH0340, and check the status of pin 31 - Ifd the PLL is locked, then pin 31 will be LOW.    Also, please make certain that pin 30 is not being held low, this would hold the device in a reset mode.

    On the LMH0341, the input should also be at one of the video data rates.  The LMH0341 has two inputs and you should make certain that the correct one is selected with pin 12 - the RX MUX SEL pin.   Pin 31 is the lock pin and will go low if the parts PLL is locked.   In the case of the LMH0341, you can also look at the SDI Loopthrough output to see if the signal is being transferred to this pin - this is another indication that the PLL has locked.   Be certain that Pin 2 is pulled high if you are going to look for Loopthrough.

     

  • 0 in reply to Mark Sauerwald88474
    Prodigy 190 points

    Hi mark,

    I fond a mistake in my custom Board in layout level.

    after correction in PCB layout i will get back to you.

    thanks for your support and help.

    regards

    j s hyanki

  • 0 in reply to Mark Sauerwald88474
    Prodigy 190 points
    Hi mark Now I am testing LMH340. PLL is locking But nothing is displaying on video monitor Regards J s hyanki
  • 0 in reply to jeetendra hyanki
    TI__Guru* 93670 points

    Hyanki-San,

    Do you have scope shot of the output of the LMH0340? Could you please send us this waveform. Also, Please send us a copy of your schematic as well.

    Regards,,nasser

  • 0 in reply to Nasser Mohammadi
    Prodigy 190 points

    Hi Nasser,

    I am attaching the schematic of LMH0340.  D15 is glowing means PLL is locking. Does PLL locking

    indicate that part is locked with incoming data or else?

    I am not writing anything to the part via SDA,SCK it is in default condition.

    What else can i check?

    Regards

    J S Hyanki

    5074.LMH0340-SCM.pdf

  • 0 in reply to Nasser Mohammadi
    Prodigy 190 points

    Hi Nasser,

    I am attaching final output of LMH0340.

    regards

    J S Hyanki

  • 0 in reply to jeetendra hyanki
    TI__Expert 4400 points

    In reviewing your schematic, it looks like you've tied GPIO_0 to LOCK_b.  Since you are leaving the LMH0340 in the default condition by not writing to the SMBus, GPIO_0 will be configured as an output driving low (it has a pulldown enabled).  This may be pulling this net low and turning on D15 without the LMH0340 LOCK_b pin ever going low itself to indicate lock.

    It looks like the LMH0340 output waveform you captured is just showing noise and no active signal.  Have you verified that you are sending the LMH0340 valid parallel data (TX[4:0]) and parallel clock (TXCLK)?

    Gary Melchior

  • 0 in reply to Gary Melchior
    Prodigy 190 points

    Hi Gary,

    The mistake was inside the FPGA now LMH0340 is working fine.

    Now I am strugling in LMH0344 and LMH0341.

    In LMH0344 Carrier Detect (_CD) is showing always lock even i am not applying input in it.

    same lock is not coming in LMH0341. Here I am attaching the achematic.

    what may be the reason, not locking the equilizer (LMH0344)?

    Regards

    J S Hyanki

  • 0 in reply to jeetendra hyanki
    TI__Expert 4400 points

    The carrier detect remaining active in the absence of an input signal is a common issue with adaptive cable equalizers.  In the vast majority of cases this is due to noise coupling to the input caused by poor PCB design and layout.

    Does the system work as expected once you apply the input signal to the LMH0344?

    For guidelines on how to improve the PCB layout, refer to the following application note on adaptive cable equalizer PCB layout techniques:

    http://www.ti.com/litv/pdf/snla071b

    Gary Melchior