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SN65DSI 83, Help me!

I have an question.

There aree "0xE5" 0bit and 7bit of "Table 8. CSR Bit Field Definitions – IRQ Registers" in datasheet.

What do they mean?

I tryed operation from DSI input to LVDS output.

then, LVDS signal is not right.

so, I checked "IRQ Registers".

I want to detailedly mean about "0xE5 - 0bit and 7bit".

under message are in data sheet.

7 bit : CHA_SYNCH_ERR :  When the DSI channel A packet processor detects an HS or VS synchronization error, that is, an unexpected sync packet; this bit is set; this bit is cleared by writing a ‘1’ value.

0 bit : PLL_UNLOCK 0 : This bit is set whenever the PLL Lock status transitions from LOCK to UNLOCK.