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DS92LX1621-22 inquiries

Atsushi Okui
Genius 4015 points
Other Parts Discussed in Thread: DS92LX1621, DS92LX1622

Hello, all

Now we are designing our next drive recorder with using DS92LX1621 and DS92LX162122.

Then, we have some inquiries regarding PLCK related and other items.

Please see the enclosed file for the detailed configuration and each items and feedback us with your comment.

3730.DS92LX1621-22 inquiries.ppt

The inquiries are also described as below;

Q1. We would like to reset CAM module via Channel Link III, Please let us know whether RESET could be processed incase the CAM module could not output PCLK to DS92LX1621.

Q2. We would like to control CLK_EN via Channel Link III, Please let us know whether CLK_EN could processed incase the CAM module could not output PCLK to DS92LX1621.

Q3. Please let us know whether SW(GPIO) could be transmitted without PCLK.

Q4. Please let us clarify the purpose to control the GPIOx EN bit on GPIO[0] Config register.

Q5. Incase setting the register on DS92LX1621 and DS92LX1622, do you have any recommendation which device’s register should be set first?

We thank you in advance for your information.

Best regards,

  • 0
    TI__Mastermind 20820 points

    Hi,

    Somebody is looking into this issue and will respond to you soon.

    Regards,

    Mike

  • 0
    TI__Expert 3050 points

    Hi,

     

    Here are the answers to your questions:

    Q1. We would like to reset CAM module via Channel Link III, Please let us know whether RESET could be processed incase the CAM module could not output PCLK to DS92LX1621.

    Yes, you can pass the reset signal through the DS92LX1621 and DS92LX1622 without the pclk present. With the devices configured to be in the camera mode configuration follow the remote wake up sequence as described in the datasheet. If there is no pclk present the DS92LX1621 will operate off of its internal oscillator and allow for the bi-directional communication to occur across the link. Once a pclk is applied to the DS92LX1621 the link will briefly reset while the DS92LX1622 locks to the new frequency of the pclk.

     

    Q2. We would like to control CLK_EN via Channel Link III, Please let us know whether CLK_EN could processed incase the CAM module could not output PCLK to DS92LX1621.

    Yes, the CLK_EN signal would be treated the same as the reset signal as described above in Q1.

     

    Q3. Please let us know whether SW(GPIO) could be transmitted without PCLK.

    Yes, see above Q1.

     

    Q4. Please let us clarify the purpose to control the GPIOx EN bit on GPIO[0] Config register.

    The GPIO EN bit in the register allows control the state of the pin, if the pin is configured as a GPIO. This allows you to either send out a logic signal or TRI-STATE the GPIO output.

     

    Q5. Incase setting the register on DS92LX1621 and DS92LX1622, do you have any recommendation which device’s register should be set first?

    Typically the default registers are sufficient for most applications. Be sure to follow the datasheet's instructions for camera mode operation. You will need to program the slave device ID into the chipset.

     

     

    Mike Wolfe

    DPS APPS / SVA

     

  • 0 in reply to Mike Wolfe
    Genius 4015 points

    Hello, thank you for your prompt reply.

    Regarding Q1 to Q3, I would like to ask you some additional inquiries. Please see each items below and feedback us with your comment.

    Our system configuration is to start the system with PCLK locked. However on some event, such as CAM module reset, the PCLK is not provided from CAM module to DS92LX1621.

    On this event;

    1. Could RESET, CLK_EN and SW(GPIO) be processed properly?

    2. How would data[0:7] and Vsync/Hsync signals be output?

    We thank you once again for your information.

    Best regards,

  • 0 in reply to Atsushi Okui
    TI__Expert 3050 points

    Hi,

     

    In the event that you intiate a camera reset which causes the camera to stop sending a pclk to the DS92LX1621, you would still be able to transmit the GPIO signals from the DS92LX1622 to the DS92LX1621. This would include the RESET, CLK_EN and SW signals that you have listed above.

    In this specific case, where there is no pclk sent from the camera to the DS92LX1621, the DS92LX1621 serializer will switch over to its internal oscillator. When the serializer operates fromthe internal oscillator it will still sample the LVCMOS inputs ( data[0:7] and HS/VS ). However, please note that there may be no frequency or phase relationship between any incoming LVCMOS data and the internal oscillator. This means that you would not have control over setup and hold times on the incoming LVCMOS data.

     

     

    Mike Wolfe

    DPS APPS / SVA