This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65LVCP114 Per-Lane P/N Pair Inversion

We have a question regarding to P/N lane inversion feature in SN65LVCP114. The SN65LVCP114 is used between SFP+ and TLK phy.

Previously every lane is connected _P to _P and _N to _N all the way to the phy. However during layout, we found it may be better to invert the connection like the following:

SFP+ RD_P---- CIN_N-[SN65LVCP114]_AOUT_N-------PHY_HS_RX_P

SFP+ RD_N---- CIN_P-[SN65LVCP114]_AOUT_P-------PHY_HS_RX_N

Questions:

Is the pair inversion transparent to SN64LVCP114? as long as it is pared between C port and A/B port?

Is there any configuration we need to apply through I2C for this operation? we didn't find any.

Thanks