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SN65LVCP114 Per-Lane P/N Pair Inversion

David Chen4
Prodigy 20 points
Other Parts Discussed in Thread: SN65LVCP114

We have a question regarding to P/N lane inversion feature in SN65LVCP114. The SN65LVCP114 is used between SFP+ and TLK phy.

Previously every lane is connected _P to _P and _N to _N all the way to the phy. However during layout, we found it may be better to invert the connection like the following:

SFP+ RD_P---- CIN_N-[SN65LVCP114]_AOUT_N-------PHY_HS_RX_P

SFP+ RD_N---- CIN_P-[SN65LVCP114]_AOUT_P-------PHY_HS_RX_N

Questions:

Is the pair inversion transparent to SN64LVCP114? as long as it is pared between C port and A/B port?

Is there any configuration we need to apply through I2C for this operation? we didn't find any.

Thanks

  • 0
    TI__Mastermind 45575 points
    David,

    I'm going to move this post to the high speed interface forum where I have seen these devices supported.

    Thank you,
    Adam
  • 0
    TI__Mastermind 43795 points

    Hi,

    There are I2C registers which can switch the output polarity.  See the registers 0x10 and 0x11 in the datasheet.

    If layout is easier to swap both the SFP+ and PHY (P/N) connections as indicated there is no issue.  The SN65LVCP114 does not recognize any protocol so inverting both input and output P/N connections will not impact the circuit operation.

    Regards,

    Lee