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Question about TCA8424 operation

Peter Ladanyi
Intellectual 570 points
Other Parts Discussed in Thread: TCA8424, TCA8418E, TCA8418

Hi,

I am finding a chip for a new design scanning keyboard matrix and the TCA8424 would be a right solution.
But, I have a question about handling the order of simultaneous pressed keys (keyboard buffer/FIFO) which is not answered by datasheet (or I missed it).

How TCA8424 works when several buttons are pressed between two read operation (input report) via I2C?

For example, how would be stored data in input report structure in these cases?

Case-1:
1.1. no pressed buttons, no interrupt request signals (stable system state)
1.2. 'A' button has pressed, then released
1.3. 'B' button has pressed, then released
1.4. ISR has been performed by CPU, and data is read from TCA8424

Case-2:
2.1. no pressed buttons, no interrupt request signals (stable system state)
2.2. 'B' button has pressed, then released
2.3. 'A' button has pressed, then released
2.4. ISR has been performed by CPU, and data is read from TCA8424

Peter

  • 0
    TI__Expert 6395 points

    Hello Peter,

    In both cases above an input report would be sent to the host with no keys pressed.  This information is present on page 17 of the datasheet, second paragraph of the INT description section.

    Basically the input report is being constantly updated even if the host has not serviced the interrupt. Here is a step by step of what happens:

    1. Stable system
    2. Key is pressed
      1. The input report is updated to reflect the key press and the interrupt is asserted
    3. Key is released
      1. Interrupt is still asserted from previous key press.  Input report is updated to reflect the key is released.
    4. Host reads input report
      1. Appears as though no key was pressed and the interrupt is de-asserted

    We recommend servicing the interrupt within 50 ms to avoid missing any key presses.  This is also stated in the interrupt section of the datasheet.

    Regards,

    Andrew

  • 0 in reply to Andrew_Mason
    Intellectual 570 points

    Dear Andrew,

    Thank you for your reply.
    It is sad because if several devices are connected on my I2C bus, it could be a case that the CPU cannot read the TCA8424 within 50ms.
    In addition, human reactions much slower than this time...
    Unfortunately, in this case we have only one I2C bus in the system and we cannot use a dedicate I2C bus to the device (which would be needed for compliance the timing of 50ms in any cases).
    For these reasons, we cannot use this chip...

    Could you help me to find another IC for connecting custom keyboard to our design where the pressed (and the released) keys/buttons are stored a small keyboard buffer (e.g. FIFO) in the chip, and CPU can read the all meantime pressed/released button codes in the right order?

    Main features which are required:
    - controlling/handling our custom matrix keyboard
    - it has FIFO-like keyboard buffer (it could be very small, but min. 4-6 key events)
    - can give interrupt if it has any key event
    - I2C bus

    Thanks,
    Peter

  • 0 in reply to Peter Ladanyi
    TI__Intellectual 2020 points

    Hi Peter,

    A possible option would be the TCA8418 or TCA8418E. 

    These devices have a 10 event FIFO buffer are controlled by I2C and will generate interrupts on key events. The TCA8418E has an improved HBM ESD rating on the keypad matrix pins and is available in a WCSP package.

    Please let me know if you have any questions regarding the TCA8418 or TCA8418E.

    Regards,
    Chris Kraft 

  • 0 in reply to Chris Kraft
    Intellectual 570 points

    Thanks Chris for the good suggestions!
    TCA8418E has too small pad distances for now but TCA8418 seems good!

    Peter

  • 0 in reply to Peter Ladanyi
    Intellectual 965 points

    Hi,

    Anybody knows where can i find tca8424 linux driver ?

    Thanks