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SN65HVD23x wire fault handling

Other Parts Discussed in Thread: SN65HVD230, SN65HVD257, SN65HVD231

I have read the datasheets for these parts, and I understand that the
signaling is compatible with "standard" 5V CAN transceivers. But the datasheets
don't mention how the transceiver handles the various fault modes of ISO
11898-2.

I have also looked at:

http://www.ti.com/lit/an/slla337/slla337.pdf

...but it doesn't talk about how the transceivers handle wire faults, either.

Could someone please elaborate on which of the following guidelines the
SN65HVD23x series of CAN transceivers DOES support:

[ ] Interruption of CAN_H (wire cut)
[ ] Interruption of CAN_L (wire cut)
[ ] Short circuit of CAN_H with Vcc
[ ] Short circuit of CAN_L with GND
[ ] Short circuit of CAN_H with GND
[ ] Short circuit of CAN_L with Vcc

Thanks,

  • Hi Brian,

    The SN65HVD230 / 231 / 232 devices are all rated for -4 to +16 volts on the CAN bus pins. Therefore the short to VCC and Ground will not damage the device (as long as VCC is within this range). This is a DC rating, so any length of time is okay.

    In terms of the two wire cut interruption situations, this will not cause damage to the device either. But it will results in loss of communication on the bus. The CAN ISO 11898-2 and -5 compliant tranceivers are not able to communicate with this type of faults.  

    Let me know if you have any more questions.

    John

     

  • Hi John,

    Thanks for your prompt reply!

    I'm not concerned about damaging the transceiver, though, I'm concerned about my robot continuing to operate with a wire fault.

    I have an NXP TJA1050 5V CAN transceiver that continues communicating at 1Mbps in all the above wire fault conditions. The way I read ISO 11898-2 is that a CAN transceiver *should* be able to continue communicating under these circumstances. Am I mistaken? Or is this just a special feature of NXP's transceivers?

    Thanks,

  • Hi Brian,

    The NXP TJA1050 cannot communicate through all these faults, a hard short to GND on CAN H will guarantee 0 V on it, how then is it possible to generate a differential voltage where CAN H > CANL by at least 500mV to be a dominant bit? Similar with CANL shorted to  Vcc.  The others depend a lot on the networking loading, timing and parasitics in the system whether communication is possible or not.  Best case it is severely compromised.

     

    If you want robustness in the CAN network you should check out our SN65HVD257 device and EVM, it is a CAN transceiver design to give redundancy at the physical layer in a very simple fashion, thus you can completely loose CANH/L on one of the 2 buses and it will still work.  http://www.ti.com/product/sn65hvd257      http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sllu172&fileType=pdf

     

    As for the other comments -- think about the physical levels needed on CANH and L and the fact you need the termination load to drive against while considering the faults below.

     

    Interruption of CAN_H (wire cut) [ ] -->  may still work depending on network load and ability of CANL to drive low enough to generate a differential voltage of >=500mV to >=900mV minimum a receiver could see as dominant. Also termination will be impacted so bit timing will be longer.

    Interruption of CAN_L (wire cut) [ ] -->  may still work depending on network load and ability of CANH to drive high enough to generate a differential voltage of >=500mV to >=900mV minimum a receiver could see as dominant. Also termination will be impacted so bit timing will be longer.

    Short circuit of CAN_H with Vcc [ ] -->  may still work  depending on network load and ability of CANL to drive low enough to generate a differential voltage of >=500mV to >=900mV minimum a receiver could see as dominant. 

    Short circuit of CAN_L with GND [ ] -->  may still work depending on network load and ability of CANH to drive high enough to generate a differential voltage of >=500mV to >=900mV minimum a receiver could see as dominant. Also termination will be impacted so bit timing will be longer.

    Short circuit of CAN_H with GND [ ] -->  will not work assuming a hard short (0 ohm) to GND.  No way for the transceiver to drive CANH >= CANL.  No positive differential voltage on the bus means it will be stuck recessive.

    Short circuit of CAN_L with Vcc  -->  will not work assuming a hard short (0 ohm) to Vcc.  No way for the transceiver to drive CANH >= CANL.  No positive differential voltage on the bus means it will be stuck recessive.

    -- Scott

     

  • Hi Scott,

    Thanks for your thorough reply, I really appreciate your effort!

    However, I just want to be clear that the NXP chip is definitely able to handle various wire faults at 1Mbps without interrupting the communications, including shorting CAN_H to GND or shorting CAN_L to Vcc. Please see the data I just took from my oscilloscope here between two NXP chips:

    http://web.barrett.com/temp/NXP_CAN_WireFaults.pdf

    So my question still stands: Do any of TI's 3.3V CAN transceivers support all of these wire faults at 1Mbps?

    I was hoping you guys would already have some test results based on the ISO 11898-2 recommendations (i.e. the ability to handle these wire faults). If you don't already have the test results (or if your legal department prevents you from publishing them), I'll buy a few samples and test them myself. I was just looking to save some time by asking first! :-)

    Thanks again,

  • Hi Brian,

     

    You are using a math function on the scope, not the receiver on the transceiver.  If you look at this you have negative differential voltage, the receiver will not see this as a difference.  If you want to do this correctly you have to set the receiver threshold at positive 500 to 900mV (that is the possible range) of the difference between recessive or dominant.  Another way is to use your scope and look at the RXD pin.  You will see it doesn't move.  The opposing CAN line will wiggle, but not with a differential voltage between CANH and L that the receiver will read correctly, the receiver is not taking the absolute value.

    -- Scott

  • Hi Scott,

    I did not try scoping the RXD pin, but I did verify that the data is being received without error by printing the CAN frames to my screen and verifying that the data received matched the data transmitted. Plus, I am not getting any BUS_HEAVY or BUS_OFF errors, so am pretty sure there is no problem here. 

    Also, I found a TI SN65HVD231 transceiver in our lab. After hooking it up and sending data to it from the NXP TJA1050, here are the results:

    http://web.barrett.com/temp/NXP_TI_CAN_WireFaults.pdf

    As you can see, the communication failed when CAN_H was shorted to 5V or when CAN_L was shorted to GND. The communication succeeded when CAN_H was shorted with GND or when CAN_L was shorted to 5V, which contradicts your theory about being "stuck recessive" in these cases.

    So, long story short - I've got the data I need now. But, I wonder if you have any comments on why your theoretical operation of a CAN transceiver does not match the actual operation observed on the desktop?

  • Hi Brian,

     

    Can you send us schematically how you set up this communication and where and how you made the shorts in the system. We will look at this in our lab.  I'd still like to see the RXD pin. It makes no sense since for a dominant bit if CANH = GND = 0V and CANL = 1.5 to 2.5V (normal for a CAN system) the differential voltage (CANH - CANL) is negative which should not be seen by the CAN receiver as the thresholds for a dominant bit is positive 500mV to 900mV.  We will take a look at it.

     

    -- Scott

  • Hi Brian,

    Scott and I went into the lab today to investigate the effects of all of the faults on both a network of two SN65HVD230 devices, and on another serparate network of two TJA1050 transceivers. Neither of them were able to communicate for 4 of the 6 faults, and both were able to marginally communicate with CANL short to GND and CANH short to VCC. As Scott was saying before, this makes sense because the driver is still able to create a positive differential voltage on the bus during these faults (CANH - CANL).

    Please take a look at the attached summary I made of the test results. Also if you have anymore information on your set up (schematic screenshots with RXD etc.) that you can share, please send me the information. I would be happy to take another look at this.

    Thanks,

    John

    CAN_Comparison_TJA1050_HVD230.pdf
  • Powering up the chip (SN65HVD23X), with a hard short on the CAN lines (say ground or battery) does open up the device to damage? Is this correct?

    Thanks,
    Rob
  • Hi Robert,

    The SN65HVD23x devices have -27 to 40V standoff on the bus pins so in a 12V system shorting to battery or ground is a survivable event. In a 24V system though the device might not survive depending on the amount of inductive flyback you get on the bus lines. Inductive flyback can easily double the battery voltage in the form of a transient wave causing permanent damage to the device. Please let me know what other questions you have?

  • Thank you Michael for the quick reply. Just to make sure I understand, if a device had a hard short on the CAN L line during the power-up event (0Vdc ramping to 3.3Vdc) for the IC, no damage would be expected? The reason I ask is that in our design, we have a CAN Transceiver that was damaged during some sort of event. It appears that the IC is burned at Pin 6 of the device, and I am left scratching my head as to the cause. I can email a photo if that would help. We can possible envision an event where the CAN L pin was shorted to ground (bad cable possibly) while the CAN transceiver was being powered.

    Rob
  • Hi Rob,

    Yes, you understand me correctly. If CANL or CANH has a hard short to GND the IC should not damage unless the transient that results on the bus pin was outside of the -27V to 40V range. Please email me the photo (mpeffers@ti.com) or post it here in this thread. Also, when diagnosing problems like this it help s to have the complete picture of the system. I would like to know what the termination scheme on the bus looks like, are their common mode chokes or filtering caps implemented on the bus pins? Schematics and or block diagrams are always a plus.