Question on fail safe operation high speed DS25BR440 quad LVDS Buffer

Any input on the above questions will be appreciated.

Hi Patrick,

LOS is a signal detector that monitors the signal level at the input pins. The datasheet does not advertise this part has internal fail safe feature. 

regards

TK Chin

Thanks TK. Does this means I have to use external fail safe biasing at 3.125Gbps? What happens to the outputs if there is no signal on inputs? It just seems like a high rate to be using external biasing.

Patrick,

The one possibility is to have the LOS# outputs feed the PDWN# inputs. This would keep the high speed outputs from oscillating due to a "no input" condition.  To provide for some external failsafe it is possible to use a 4.7K pullup and a 2.2K pulldown.  This will setup a 50 mV offset on the input pins.  This offset will hold the DS25BR440 in a known state if the input signal is disconnected or muted.

Regards,

Lee 

Hi Lee,

  Thanks. Having the LOS# outputs feed the PDWN# inputs is a great suggestion. Can you elaborate on what happens to outputs when inputs are in power down. The datasheet is very scant with details about the power down mode.

Patrick

Hi Lee,

   Also, if the LOS# outputs feeds PDWN# inputs,  Will the LOS signal detector that monitors the signal level at the input pins go into in power down mode when there is no signal? If so how will IC detect a valid signal after channel is power down? The datasheet does not provide much about power down condition.

1)      When a channel is in power down mode, is the LOS signal detector that monitors signal level at input also in power down? I want to make sure that IC will be able to detect a valid signal after channel is power down without power cycling.

A: The LOS indicator is still working when the channel is in power-down mode.  No power cycling will be needed.

2)      What happens to output when a channel gets powered down?

A: The output goes into a Mute condition, the output amplitude = 0 mV

Regards,

Lee

Hi Lee,

   What does 0mV  in LVDS land means? Does this mean 0mV amplitude around the Vos of 1.2V or 0mV around GND(0V)?  I am trying to determine how my lvds receiver will react when ds25BR440 drive both inputs with 0V. I am not even sure if this is legal.

Hi Eric,

LVDS outputs by specification will drive an output common mode voltage of ~ 1.2V.  The LVDS input uses this common mode voltage to help center the incoming LVDS signal into the middle of the VICM range.  Typically LVDS inputs will have an input common mode range ~ 0-2.4V, but this can vary based on the supply voltages used for the LVDS input.

The DS25BR440 LOS function will look at the VID to determine if a LVDS signal is present or not.  Vcm is not factored into the LOS decision on this device.

Regards,

Lee

Thank you for the response. So the LOS is purely a cable detect if no failsafe biasing has been designed in. If you failsafe bias the input circuit LOS will never assert?

Eric,

Yes, even a small failsafe bias on the input will limit the functionality of the LOS circuit.  As the failsafe bias increases LOS will never be able to register a "no signal present" condition.

Regards,

Lee