This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65LVDT386DGG maximum signaling rate

Other Parts Discussed in Thread: SN65LVDT386, SN65LVDS386

Dear Sir/Madam,

I've used in my design implementation the following TI part - SN65LVDT386DGG.

In the parametric table from TI webpage of this product the maximum signalling rate of the part is 630 mbps.

This is exactly the number was appear in the previous edition of the datasheet.

I am wondering to see the updated datasheet with 250 mbps as the maximum signalling rate.

I am confused to understand this difference.

Can you help me please with this issue.

With Best regards.

Boris Barak.

  • Hi Boris,

    Back when this part was characterized only a single channel was studied for output performance metrics. It was discover later that the performance of the part was de-rated with an increase in the number of channels that were switching simultaneously. Therefore the data sheet needed to be amended to state that the SN65LVDT386 only supported up to 250Mbps with all channels active. As far as the parametric tables go on the website I will ask the marketing team to update this information with the most recent and accurate information.  Hope this clears things up, if you have any additional questions please let me know.

    Regards,

    Mike

  • Hello Mike,

    Thank you very much for your answer.

    I am going to use SN65LVDT386 to convert two 8-bit parallel buses on up to 297MHz clock frequency.

    For the sampling clock signal SN65LVDT2D used.

    Both parallel buses and the clock are coming from Lattice FPGA with the ability to clock phase shift.

    Can you evaluate please if it possible (I am already run the above scenario but only up to 148.5MHz).

    With best regards.

    Boris Barak.

  • Hi Boris,

    I have included a screen capture from the data sheet of the SN65LVDS386 running at 250MHz. It shows an open eye at this speed so the consequence of moving to a higher data rate will be a somewhat smaller eye opening. How much that eye will close I really cannot say but it should be manageable.

    Regards,

    Mike

  • Hi Mike,

    Thank you.

    We will test it on the board.

    I will let you know regarding the results.

    Best regards.

    Boris Barak.