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DS90UB913Q PCLK change on the fly

Tony Xia
Prodigy 105 points

Hi TI,

    When I use "PCLK from imager mode " for DS90UB913Q, Could PCLK  be changed on the fly? or need some constraint?

Thank  you!

Tony

  • 0
    TI__Intellectual 2855 points

    Hi Tony,

    Yes, the PCLK can be changed during normal operation. However, the link will likely unlock and re-acquire lock with the new frequency. Depending on the frequency range change, you may also need to change frequency mode (with 12-bit interface: Low-speed for <50MHz, High-speed for 50MHz-75MHz). If the mode changes, a hardware reset is recommended.

  • 0 in reply to Ryan Bailey
    Prodigy 105 points

    Hi  Ryan,

    In my design,  I change PCLK  by reconfigrating imager's register through I2C. But  ONCE PCLK is changed from 36MHz to 24Mhz,  913Q don't  feedback ACK to 914Q from logic analyzer.  At that time, imager feedback the ACK.

    Thank you.

    Tony 

  • 0 in reply to Tony Xia
    Prodigy 105 points

    Hi Ryan,

     

    From the experimental, DVP signal(PCLK,HSYNC,HREF,DATA)  can be changed on the fly, but which  influences  I2C communication. Are there some constraints for changing PCLK?

  • 0 in reply to Tony Xia
    TI__Intellectual 2855 points

    Hi Tony,

    The I2C communication is dependent on the Lock state of the link - meaning that the embedded clock and data has been recovered from the forward channel (913 to 914) link. This link is dependent on the embedded clock, namely the PCLK signal. Other signals can be changed on the fly without disruption to the bidirectional link, but PCLK is necessary for continuous operation of the link. When PCLK stops, or changes frequency, the link is interrupted temporarily while the devices re-establish Lock.

    Also, if the PCLK moves into another operational range (example: 10-50MHz then changes to 50-75MHz), then a change to the frequency mode and a device reset are needed.

    So to summarize: Changing PCLK disrupts the link temporarily. I2C communication can be disrupted during that time.

  • 0 in reply to Ryan Bailey
    Prodigy 105 points

    Hi Ryan,

    Could you recommend a method to maintain the I2C communication's intergration when changing PCLK on the fly?

    Thank you!

    Tony

  • 0 in reply to Tony Xia
    TI__Intellectual 2855 points

    Hi Tony,

    In general, changing the PCLK frequency will cause the link to temporarily unlock/re-lock, which means that the bidirectional control channel is unavailable for the short time that LOCK=LOW. There isn't really a practical method for mitigating this. I suggest using the LOCK pin status or some other GPIO to check if bidirectional communication is available before starting I2C transactions.