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what does the register 0x35 mean for DS90UB913Q

Tony Xia
Prodigy 105 points

Hi TI,


In my design, Rmode on DES is 0 ohm, Rmode on SER is 100K ohm. REG[0x1F] on DES is 0x00; REG[0x05] on SER is 0x10. That is :913Q in "PCLK from imager" mode; 914Q in 12bit LF mode. Is it all right?

Bit3 and Bit2 of REG[0x35] on 913Q is the status of mode select pin according to the datasheet page 27. But the dump value are all zero. Bit0 of REG[0x35] on 913Q is "1". What does the REG[0x35] mean? 

Thank you.

Tony

  • 0
    TI__Expert 7395 points

    Hi Tony,

    For 12-bit LF mode, SER reg0x05=0x10 and DES reg0x1f=00 is correct.

    When SER Rmode=100Kohm, the clock source is from external PCLK input and SER reg0x35[3]=0. If reg0x03[1]=1, PLL will lock to external PCLK source if reg0x35[0]=1 and switches to GPO3 input if reg0x35[0]=0.

    Dac Tran

    SVA APPS

  • 0 in reply to Dac Tran
    Prodigy 105 points

    Hi Dac,

     As you said, when SER Rmode=100Kohm, the clock source is from external PCLK input and SER reg0x35[3] =0,  but what about SER reg0x35[2]? In my opnion, SER reg0x35[2]  should be "1" according to the  datasheet, but dump value is "0".   Is there any wrong?

    Thank you!

    Tony

  • 0 in reply to Tony Xia
    TI__Expert 7395 points

    Hi Tony,

    Your settings are correct. Note SER reg0x35[3] and reg0x35[2] are read only bits. There is a mistake in the datasheet and reg0x35[2] always read only 0.

    Dac Tran

    SVA APPS