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SN65LVDT388 Question

miao meng
Prodigy 70 points
Other Parts Discussed in Thread: SN65LVDT388

Hi,

I am looking for a LVSD receiver that is able to receive 8 bit lvds signal generated by FPGA, after this LVDS Receiver, the 8 bit signal is used as switching signal to control 8 switches of my application. the signal rate of it should be around 200MHz to 400 M Hz

I am thinking SN65LVDT388, but since it is a simple buffer and does not have the clock input, I am afraid of the output signals of this receiver are not synchronized due to the output skew and wiring issues.

so my questions are:

1. Do you have any product that can do the work described above, and synchronize the output signals as well? and how do I use it?

2. How do I connect the receiver with the FPGA? does copper wire work? or I have to use some special cables?If so, what's the part no.

Thanks in advance!

  • 0
    TI__Mastermind 20820 points

    Hi Miao,

    The SN65LVDS388 will work for application as it is an 8 input to 8 output buffer as long as your system can tolerate the maximum channel to channel skew of 400pS. Copper wire will work for your application but you should use care in selecting a cable that has as little lane to lane skew as possible to avoid exceeding your link budget for skew.What type of connector were you thinking of using to interface between the FPGA and the LVDS buffer?

    My team does not have any particular devices that support synchronized outputs in an LVDS buffer but you can check in our clock and timers portfolio as that team may have a part that supports synchronized outputs.

    Clock and Timers Portfolio: http://www.ti.com/lsds/ti/analog/clocksandtimers/clocks_and_timers.page

    Clock and Timers e2e Web Page:http://e2e.ti.com/support/clocks/default.aspx

    Regards,

    Mike