• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 33 subscribers
  • Views 2707 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

I2C buffer IC P82B96

Eric Lo63813
Intellectual 450 points
Other Parts Discussed in Thread: P82B96

Experimental environment


VCC1 = 3.3V, + V CABLE = 5V, VCC2 = 3.3V, R1 = 330Ω, R2 = 1KΩ, C2 = 100pF, the actual CABLE LENGTH = 90cm

I2C speed is 350KHz

 

Circuit

Test Result

(CH1=I2C_SCL, CH2=I2C_SDA, CH3=RxTx, CH4=RyTy)

My question:

Why are there CH1 & CH2 such I2C signal distortion? How to solve?

Thanks ~~

  • 0
    TI__Expert 6395 points

    Hello Eric,

    This device features a static offset to prevent the bus from locking up.  In short, by not driving all the way to ground it is possible to differentiate between the P82B96 driving the bus and an external device driving the bus.

    Regards,

    Andrew