Hi,
According to the internal circuit of SN75HVD3082, when driver is enabled, the receive line should be high impedance. But I see that it is going low. Why is this happening.
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Hi,
According to the internal circuit of SN75HVD3082, when driver is enabled, the receive line should be high impedance. But I see that it is going low. Why is this happening.
Hi Davis,
When the driver is enabled it will continuously drive the bus to whatever state the D pin is in. Since you are using a half-duplex device, the driver output lines and the receiver input lines are tied together. Page 9 of the datasheet shows that if the DE pin is tied high the driver will always be driving the A & B pins differentially.
Where in the datasheet are you referring to that says the receive lines should be high impedance when the driver is enabled? The receiver and driver are controller independently by the DE and /RE pins. If you tie the DE and /RE pins together then either the driver or the receiver will be enabled.
Please let me know if you have any more questions.
Thanks,
John
Hi Davis,
You are correct, if the /RE pin is tied high the R output should be disabled and it should be in a high impedance state. Do you have a schematic that you could share showing your set-up?
Thanks,
John
Hi Davis,
I am no expert at the Si8431 device, but I think the reason you are seeing the low on the OUT3 pin is because of the way the device is designed. On page 20 of the datasheet there is the following table:
I feel like there is one line in the table that is missing (with "X", "H", "P", "P"). But, from looking at the table it looks like if the input is floating "X", the EN pin is high, and both supplies are active, then the Output will be low. Can you check if the R pin is actually driven low? Are you just assuming the pin is low because the OUT3 is low?
Let me know if you think I am misunderstanding the table.
Thanks,
John
Thanks John. Let me check with Silicon labs about the missing state.
Regards
Davis