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DP83848YB Internal Loopback

Mark Skaggs
Prodigy 10 points
Other Parts Discussed in Thread: DP83848YB

Hello TI Technical Support,

    I writing a test program to test the DP83848YB device using a Credence digital component test system. I do not have the DP83848YB connected to an Ethernet host so I am attempting to perform the internal Loopback function to verify the signal path between TXD[3-0] and RXD[3-0] through the device. I set bits 14 and 8 of the BMCR (Loopback enabled, 10MPS, at full duplex) and the remaining bits to 0. I write the Preamble pattern to TXD[3-0] then a start of frame  followed by a fixed data pattern. I am anticipating a similar data pattern on RXD[3-0] and just read all zeros. What else needs to be done to use the loopback feature for this device?

 Thanks,

 

Mark

  • 0
    TI__Mastermind 31600 points

    Mark,

    Your basic intent sounds correct.  That is to say, you should be able to enable internal loopback, provide packets to the TX MII, and see data on the RX MII.  We will need to perform a bit of debug to determine what is happening in your application.

    Your register setting for 10M full duplex internal loopback (BMCR:  4100) is correct.  Have you confirmed that basic register functionality is operating as expected?  For example, can you read back registers?  Have you confirmed that the device is configured for MII operation (as opposed to RMII operation), etc.?

    Have you confirmed the 10 Mb/s MII Transmit Timing that you are providing against the timing diagram in the datasheet?  Are you seeing the correct clock characteristics for TX_CLK and RX_CLK?

    Patrick