This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hello,
I am dealing with a design that may encounter open LVPECL inputs on SN65LVELT23 (LVPECL to LVTTL translator). From the data sheet, I can see the device has two 50k pull resistors guaranteeing 'Vcc/2' biasing on both 'D' and '/D' inputs.
Per the datasheet, I don't believe that guarantees a low output condition (as I would not have enough difference in the inputs for the output to switch), making me think that I have to add a weak pull resistor (say around 25k to 50k) if I want a guaranteed output. Am I thinking this correctly?
Would this also work if I have a 'Y' Thevenin termination with three 50 ohm resistors?
Thanks in advance,
Jose
Hi Jose,
Typically with unused inputs on devices like this you want to drive them into a know state like VCC or GND. The circuit that you are thinking of implementing is a correct way of bias unused inputs and is explained in both the application reports below:
http://www.ti.com/lit/an/snla051b/snla051b.pdf
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=slla082b&fileType=pdf
Please let me know if you have any more questions?
Regards,
Mike