I have a few questions about this component:
1. Is it legal to supply the device with V_CCP while holding V_CCI at 0 V? Is this considered RESET condition, with the related current consumption from V_CCP?
2. When V_CCI is now raised to its operating level (e.g. 3.3 V), does the component go through a power-on reset cycle? Otherwise, are there specific requirements that need to be taken into consideration?
Hi Johan,
Sorry for the delay. From page 5 of the datasheet, having VCCI pulled low will not put the device into reset, as only VCCP is tied into the Power-On Reset block of the chip. To initialize the device back to default values, this will not work.
If you have to keep VCCP always high, and are going to be pulling VCCI up second, the best way to reset the device would be to assert the /RESET pin low for at least 4nS.
