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10M mode of DP83848I

Xinzhi Chen
Prodigy 50 points
Other Parts Discussed in Thread: DP83848I

Dear all:

    I am using DP83848I's SNI interface. But I have met a problem of TCP re-transmission when using that port.

    The MII_MODE pin is tied to high through a resistor and the SNI_MODE is also tied to high through a ressitor.

    The BCMR is set to 0x0000 and the ANAR is set to 0x0021. 

    If I pull down the Ethernet line and then plug in it. The communication will be OK. If I set the PC as 10M-Half Duplex, the communication is also good. 

    Can any one give me some hint?

  • 0
    TI__Mastermind 31600 points

    Hi,

    Could you provide some information on the conditions under which the problem occurs? 

    For example, if the PC is set as 10M-Half Duplex, the communication is good, but what is the PC setting when the problem occurs? 

    Also, could you provide some additional details on what specifically is done when you "pull down the Ethernet line and then plug in it"? 

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Dear Patrick:

        When in the problem situation, the PC's net interface card is set as "auto".

        I think the problem may relate to auto-negotiation. When the DP83848I is set to 10M half-duplex and disconnect the net line then re-connected the net line, the PC will perform auto-negotiation and work in 10M half-duplex mode. But if the net line do not disconnect, the PC will not perform auto-negotiation, so the working mode is unsure.

        I find that two factor affect the DP83848 working mode: 1. the MII_MODE and SNI_MODE pin; 2. BCMR setting. If the BCMR is not set to 10M mode, the RX_CLK and TX_CLK is 25MHz(100M mode).

     

  • 0 in reply to Xinzhi Chen
    TI__Mastermind 31600 points

    In addition to setting the MII_MODE and SNI_MODE straps, you can strap the DP83848 for 10M half duplex using the AN straps.  This will configure the TX_CLK correctly. 

    The necessary strap positions would be:

    • MII_MODE (RX_DV):  pull high
    • SNI_MODE (TXD_3):  pull high
    • AN_EN (LED_ACT/COL):  pull low
    • AN_1 (LED_SPEED):  pull low
    • AN_0 (LED_LINK):  pull low

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Dear Patrick:

        The AN_EN, AN_1 and AN_0 have been tied low through 2.2k resistors. The graph is our schematic.

                                             Figure 1. Schematic of DP83848I in 10M half-deplex mode

        I have used oscillograph to capture some graphs.

        Test case 1 : Set the CPU always in reset mode and connected the DP83848I to PC. PC's net interface card is set to "Auto" mode.

         The TX_CLK baud rate before reset and after reset is different. Before reset, the baud rate is 10M, after reset, the baud is 25M.

        The TX_CLK baud rate is changed from 25M to 10M after reset in 1.7 second.

         Test Case 2: Do not connect the DP83848I to PC the TX_CLK baud rate is always 25M

        

  • 0 in reply to Xinzhi Chen
    Prodigy 50 points

    Dear Patirck:

        Additional information. Even though I set

       AN_EN  float

       AN1       high

       AN0       high

       The communication still has problem when the PC's net interface card is set as "Auto"

  • 0 in reply to Xinzhi Chen
    TI__Mastermind 31600 points

    First, I have some comments on the schematic:

    1. Ferrite beads to isolate supply nodes can be helpful in some applications, but from the portion of the schematic shown, the local de-coupling caps are insufficient to effectively regulate the local supplies.  I would recommend removing the ferrite beads L16 and L17.  These may not be contributing to this problem, but they may cause other problems.
    2. The PFBOUT and PFBIN pins should have local de-coupling capacitors near the pins as indicated in the datasheet.  I do not see these in the schematic.  They should be added. 

    As noted previously, the necessary strap positions would be:

    • MII_MODE (RX_DV):  pull high
    • SNI_MODE (TXD_3):  pull high
    • AN_EN (LED_ACT/COL):  pull low
    • AN_1 (LED_SPEED):  pull low
    • AN_0 (LED_LINK):  pull low

    This appears to be the default values in the schematic.  I would suggest configuring the board to have the straps in these positions and performing the following simple tests:

    1. Disconnect the cable to the PC.
    2. Power up your board.
    3. Probe the TX_CLK and verify the frequency.
    4. Read the BMCR (address 0x00) and 10BTSCR (address 0x0A) registers.  BMCR should read 0x0000.  10BTSCR should read 0x8XXX (bit 15 should be 0x1). 

    Once we can confirm this initialization and confirm that the device is in the proper state, we can continue the investigation and review the functionality when the cable is connected to the PC.

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Dear Patrick:

        After  the resistor which pulls AN_EN low is removed and then re-soldered. All the problem gone. It maybe relates to incomplete weld. 

        Thank you. You dose help me a lot.

        But why the TX_CLK frequency may change from 25MHz to 10MHz in 1.7 second still puzzle me.