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EMI issue : slow down LVDS edges for SN65LVDS93A

Stephen Capelli
Prodigy 210 points

Other Parts Discussed in Thread: SN65LVDS93A, SN65LVDS93

Hi,

On my design, I'm experimenting EMI radiatied harmonics due to LVDS communication (poorly routed).
I'm still improving PCB design, but I was wondering about slowing down edges on my LVDS signal.
Since I'm clocked @ 30MHz (CLKout), I do not need such sharp edges.

Since LVDS is current driven, I was wondering how to slow down edges on SN65LVDS93A?
Are there similar product that allow to fit edge to target frequency?
Is SN65LVDS93 a slower release forv SN65LVDS93A? What are differences?

Thanks

BR

     S.C



  • 0
    TI__Guru* 76130 points

    Hello,

    There is no option to modify the edge rates on the device. The difference between these two is only the maximum frequency supported, the I/O cells are the same.

    You will have to reduce the edges by adding external passive components but that will also impact the signal integrity. I recommend to improve the layout better. 

    Regards.