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TLK10002 no LA output

Yaoting Yang
Intellectual 780 points
Other Parts Discussed in Thread: TLK10002

Hi,

The following is my settings to a TLK10002 chip,

Reference frequency is 250MHz; 4:1 mode; only channel A has been used.

LS side: line rate is 2.5Gbps; MPY=5;Rate scale = Full rate.

HS side: line rate is 10Gbps; MPY =10;Rate scale = Full rate.

I am using an Altera FPGA, Cyclone IVGX to hook up to the TLK10002 LS side. I have tested the transceivers in FPGA by loopback the transceiver's tx to rx internally. i got my test data being looped back correctly. PCB board is OK. The traces connection between FPGA and TLK10002 are good. The issue is, when i set the "ti_ls_ok_in" to ground hoping to get the lane alignment sequence out of the TLK10002 chip, but there is nothing. Always give me control word "9C9C". I don't know why. Is there any one who can help me through? Very appreciated!

Yaoting

  • 0
    TI__Mastermind 20820 points

    Hi Yaoting,

    Did you implemented the required lane alignment scheme that the TLK10002 needs to align properly? Without this the TLK10002 will not achieve proper lane alignment. Your FPGA needs to send a sequence of bits to the TLK10002 so that the it can align itself properly. The attached zip file has a quick start up guide and some other information on the topic.

    If you have done this already I will have to do a deeper dive into your design and IC settings but I want to check to see if you performed this task first. Thanks for bringing this to my attention and let me know where I can help?

    Regards,

    Michael Peffers

    Analog Applications

    6177.sllc431.zip

  • 0 in reply to Michael Peffers
    Intellectual 780 points

    Hi Michael,

    Thank you very much for your attention and helps.

    I do have the LA in my design.

    I found the problem. It is the pin of PRBSEN which by accident i floated in my FPGA. When i ground it the TLK10002 works without any problem so far. It sends out the LA sequence correctly.

    Thanks

    Yaoting