Hi,
I bring up the TUSB1310A, I can get PCLK and ULPI clk from PHY, but I try to write register 04 for ULPI reset, but PHY do not assert the NXT. Could you help me.
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Hello Zhen,
We are reviewing your post and we will give you an update by Monday.
Regards,
Diego.
Hello Zhen,
I cannot see clearly how are you trying to activate the reset. You only have to assert the bit 5 of the Function Control register(04h-06h), and the response on the TUSB1310A will be: After de-asserting the ULPI_DIR, the PHY must re-assert the ULPI_DIR and send an RX CMD update on the Link Layer Controller. Also please take into account that the Link Layer Controller must wait for the ULPI_DIR to deassert before using the ULPI bus.
Best regards,
Diego.
Hi Diego,
Thanks for your replying.
For this issue, I had resolved it, when TI PHY asserted the nxt,the ULPI_CLk in FPGA which output by DCM is not stable, the frequency of ULPI_CLK is less than 60M, So I waited until ULPI_CLK is stable, then wrote ULPI reset, I could read this nxt pulse. And TI PHY work well.
Best Regards
TianZhen