Hi members.
This is Ben.
PC16550D's datasheet about Page17.
Bit7 description of 8.0 Registers.
When the error of this content is occued,
the LSR7bit is do you interrupt reflect?
Because this question is Bit5 and Bit1～4 Interrupt Reflect.
It is written as Bit5 as page17 , Bit1～4 as page16's:LINE STATUS REGISTER.
Best regards
BEN.
hello Tsutomu-san,
Are you referring to the Divisor Latch Access Bit (DLAB)?. This bit enables the access to the Divisor Latch registers. In other words, if this bit is set to 1 you will get access to the Divisor Latch Registers DLL & DLM by addressing 0 and 1 respectively, meanwhile when DLAB is set to 0, you will get access to the RBR (read) & THR (write) by addressing 0 and IER by addressing 1.
Best regards,
Diego.
