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Additional noise immunity during Bus-Idle State sn65hvd1780

Paul PV
Prodigy 70 points
Other Parts Discussed in Thread: SN65HVD1780

Hi,

           My Rs485 Bus system is having 80 Nodes with a moderate speed of 40Kbps. By referring the data sheet of 65hvd1780 I found that these devices are Bus-Idle fail safe. By this I presume that the receiver output will be at high value when the A-B input is with in the Hysteresis level. But the minimum Hysteresis level of these devices are 30mV. So I believe for getting additional noise immunity during bus-Idle state I have to go for biasing resistors. I found the biasing resistor design for Legacy devices in “RS-485: Passive fail-safe for an idle bus” By Thomas Kugelstadt.
I couldn't find any similar design document for 65hvd1780.

Please mention me if I am wrong somewhere. Or please tell me whether I can use the same formula of Legacy devices to design Biasing resistors of 65hvd1780.

  • 0
    TI__Mastermind 21779 points

    Hi Paul,

    The failsafe feature of the device guarantees that when the bus is floating, the output of the receiver is in a known state. This is basically done by adding a bias to the receiver.

    If you are only concerned about the output of this one node on your network, there is no need to add additional failsafe resistors to the network termination. But if you want to guarantee the output of all 80 nodes on your network, and all the nodes will not have internal failsafe biasing, then you will want to add external failsafe bias resistors. The method outlined in the app note will work just fine with the SN65HVD1780. I would just recommend biasing the network in the same direction of the device (bus line A pulled high, bus line B pulled low).

    Thanks,

    John

  • 0 in reply to John Griffith
    Prodigy 70 points

    Hi John,

             My network uses same device for all 80 Nodes. The bus topology daisy chain, around 300m long and runs in heavily noise environment with contractors, vfds and mechanical brakes. Currently I am using 75176B which is giving me occasional errors. Bus-Idle state is often occurred in the communication due to frequent master switching.

    So even if all the nodes are 65HVD1780, should I go for Biasing resistor?


    Regards

    Paul

     

  • 0 in reply to Paul PV
    TI__Mastermind 21779 points

    Hi Paul,

    The external biasing resistors should not be needed since all the nodes will have the built in failsafe biasing. But since you are only using 80 nodes, as opposed to the maximum of 320 nodes you do have the ability to add external failsafe biasing onto the bus without overloading the drivers.

    Just make sure that the input resistance of all the nodes in parallel, and the parallel combination of the fail safe resistors, combination does not present a load that is less than 375Ω.

    Thanks,

    John