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Question about timing relationship between TPA and TPB using 1394 PHY TSB81BA3E

Other Parts Discussed in Thread: TSB81BA3E

Hi,

The APP note for the 1394 PHY TSB81BA3E makes a somewhat vague reference to a timing relationship between TPA and TPB as it relates to matching etch lengths for the path from the connector to their respective pin pairs. I was looking for some more detail on how matched they have to be before there is a performance hit. Our current production board has a 50 ps etch delay mismatch between TPA and TPB diff pairs and am wondering if this may be contributing to what appears to be marginal performance with long cables operating at S800 when compared to same link terminated into a PC based system.

Thanks,

Mitch

  • Hello Mitch,

    We recommend to have a differential intra-pair skew <10ps and a differential inter-pair skew <25ps for S400.

    So a skew of 50ps could be an issue.

    Regards.

  • Elias,

    Thank you for your prompt answer. I wish the data sheet/app note was more specific about that constraint.

    In the interest of further understanding why minimizing the skew is important, can you describe in a bit more detail (than the app note) what is going on between TPA and TPB pair timing and how it impacts data errors. I had always thought the TPA and TPB pairs were like two independent 8B/10B data streams, one in and one out.

    Thanks,

    Mitch