DS90LV019TM/NOPB recognize level

Mr.Michael

Thank you for quick reply.

I undestood that use at outside min/max rage is not guatanteed.

Best Regards.

Taichi.

Hi,Mr.Michael

I have two additional questions.

1)Following content is wrote on Datasheet_P4.

V_IH:Maximum Input Low Voltage

V_IL:Minimum Input High Voltage

Why is there Maximum/Mimum in front?

I think it is no need for now.

2)GND difinition is 0V?

If a low voltage of LVDS signal is below 0V,is there problem?

According to Absolute maximum ratings , low volatage is -0.3V .

In the case of GND = 0V,inputing from -0.3V to 0V  to this device,input voltage will be over V_IH range .

If there is problem,please tell me a countermeasure.

I am looking forward to your reply.

Best Regards.

Taichi.

Hi Taichi,

1) Thanks for pointing out the discrepancy. The minimum input high voltage is there to indicate the threshold where a high signal is recognized, and likewise, the maximum input low voltage is there to indicate the threshold where a low signal is recognized. However, since the tables show the actual range for input high and input low, I agree with you that the use of the "Maximum/Minimum" terms in the VIH and VIL description do not need to be there. Instead, just refer to the min/max range specified in the corresponding columns.

2) GND definition is the voltage level associated with the GND pin of the device.

The low voltage for LVDS should not be below 0V. The common mode voltage is typically around 1.2V for LVDS signaling, and the voltage differential VOD is 350mV, or 700mVpp, so I would expect a signal range of approximately 850mV-1550mV.

The low voltage abs max rating of -0.3V is specified to denote the absolute point beyond which the device's lifetime is no longer ensured. If your device temporarily experiences a low voltage of -0.3V, for example, this may be ok, but it is a different matter if you are attempting to operate at this voltage. Our more recent datasheets typically have a footnote associated with the abs max table:

"Absolute Maximum Ratings are those parameter values beyond which the life and operation of the device cannot be ensured. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics” specifies acceptable device operating conditions."

Do you have a schematic or additional design requirement that you could share to detail why you will need low signals to operate below 0V?

Thanks,

Michael

Hi Mr.Michael Thank you for quick reply.

1)

I could understand that you wrote.Thank you.

2)

I could understand about GND definition.

Input signal range from FPGA to DS90LV019_pin2 is -0.099V to 3.06V.

There might be a diffrence between an oscilloscope GND and a device GND,but if there is not so diffrence,is there a problem?

Best Regards.

Taichi.

Hi Taichi,

I would still be concerned about having DIN go below GND consistently if GND = 0V, since the FPGA will be providing a -0.099V for an input low. Will that -0.099V input low appear if both FPGA and DS90LV019  share the same GND? If that is the case, then if you could bias the signal to boost the signaling up by 0.5V so that it ranges from 0.401V to 3.56V instead, that may work.

Thanks,

Michael

Hi.Mr.Michael

Thank you for quick reply.

Currently both FPGA and DS90LV019 share the same GND , -0.099V input appear due to noise

I need to bias the signal to boost .

Still,I couldn't understand a reason of 0.5V boost you wrote.

You mean that I should set signal level to a center of Input low voltage?

And do you have any good idea of boosting signal? If possible,please post specific circuit.

In this case,FPGA and DS90LV019 are connected by single end.

I am looking forward to your reply.

Best regards.

Taichi.

Hi Taichi,

Since the input low ranges from GND-0.8V and input high ranges from 2.0V-Vcc, I suggested 0.5V bias as an example in order to place your input signal safely within the recommended operating range of the DS90LV019. 

I was wondering about using a bias tee to provide this offset:

5611.Bias_Tee_Design_V2R.pdf

Regards,

Michael