Where to place the PHY chip

Some of these questions will be specific to the PHY chosen. Have you selected the PHY for this application?  In the meantime, I will try to help move the discussion forward. 

You note a plan to operate over coax cable, but you also mention a transformer and an RJ-45.  This is more typical of a CAT-5 cabling implementation.  Could you clarify the planned implementation?

In your existing sample design, what are the overall distances for the following:

1. AM3874 to PHY
2. PHY MDI pins to 50 Ohm terminations (if any)
3. Terminations to Samtech connector.
4. Samtech connector to RJ-45

I believe that is how the system looks.  Please let me know if I have misunderstood the full path and the connections.

Patrick

Thanks Patrick,

   Yes we are using cat-5 cabling.

The distances are as follow:

1- From AM3874 to PHY: 2cm

2- PHY MDI pins go directly to Samtec connector ( 2cm)

3- samtec connector 3 cm (Length of Samtec connector)

4- other side of Samtec connector goes to RJ45 which has the transformer inside (2cm).

So essentially, the output of PHY goes to RJ45 which includes transformers via a long track (around 7cm) and there is no impedance matching circuit in between.

The symptom that I can see is that system works perfectly for say 10 minutes and then stops. (I can ping the device for 10 minutes and then pings timeout). The only way that I can restore connection is to unplug and re-plug the cable.

 If I go to windows and disable the Ethernet card which is at the other side of connection, as soon as I enable it, the connection establishes for another 10 minutes.

If I try to bring the eth0 on Linux and then bring it up again, I am getting no response and connection is still lost.

The 10 minute time that I mentioned above, is variable between systems and on the same system, it could vary from 2-3 minutes to some hours. ( it is a random value and we could not find any relationship between this and any other parameter).

Debugging this may be specific to the PHY being used.  What is the PHY?

Are there any visible indications of problems on the board with the AM3874 and the PHY?  I am looking for something in the hardware implementation that correlates to the ping timeout in software.  For example, is there a link LED that flickers or remains de-asserted? 

When you say there is no impedance matching between the PHY and the RJ-45 connector, what do you mean?  Are the board traces impedance controlled?

Patrick

There is no visual indication.

The impedance is controlled as far as we can do, but since the PH is on a board and the RJ45+transforme are on another board, the calculation for impedance is not complete (we can only check impedance on each board separately and not total impedance and also we can not check the effect of connector that exist in between.)

Understood.  The end to end impedance cannot be completely controlled, especially with the connector.  What I am trying to understand is the different sections that could affect signal integrity. 

Since the CAT-5 cable is nominally 100 Ohms, we route the board traces as 100 Ohm differential or 50 Ohms single-ended to ground.  Was this done for the board with the AM3874 / PHY and for the board with the RJ-45 connector?

Patrick

How do you route traces as 100 Ohm differential or 50 Ohm single? Can you please lead me to some document or draw me how can I check if they were developed in that way? AS far as I can see, they are traced as differential but on say am3874/phy board there is no resistor/capacitor/inductor to make the traces as 100 Ohm to ground.

Do you have the information you need on this?  Can we close this thread as verified?

Patrick