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TL16C752C Problem

Other Parts Discussed in Thread: TL16C752C

Hi all,

Recently I'm working on the TL16C752C UART chip and I have noticed some problem with it.

1. Data Receiving Error

Error occurs quite often when receiving data. I noticed the "Short STOP Bit Errata", and did the following tests:

  • Use 8-N-1 setting for TL16C752C to receive data sent from USB UART with 8-N-2 setting, the data receiving is all right without error.
  • Use 8-N-2 setting for TL16C752C to receive data sent from USB UART with 8-N-2 setting, still a lot of error.
  • Use 8-E-1 or 8-O-1 to receive data in 8-E-1 or 8-O-1 format, respectively, still a lot of error.
  • Decrease the divisor by 1, there is no error.

BTW, I have made measurements and confirmed that the stop bit sent by my USB UART is exactly 104us at 9600bps.

So, I think the workaround 1 (to use 2 stop bits) in the errata only takes effect when the TL16C752C is configured as 8-N-1 and the data sent to it is actually 8-N-2.

And decreasing the divisor works, because in this case the TL16C752C samples the RX data in higher frequency, which makes the stop bit appear longer. However this is not a good way, as I have to modify the driver and write in the code something like "if the UART is a TL16C752C, make sure to decrease the divisor by 1 before writing to DLL/DLH"...

I guess it's pretty sure that it is a bug with TL16C752C. Is there any new version coming to correct this bug?

2. "One Baud Time" when 485EN = 1

The main reason I use TL16C752C is the automatic RS-485 flow control feature. However, when I set 485EN bit, all the outgoing characters on TX pin appear to have 1 extra bit.

I noticed that according to the datasheet, the DTR# will be asserted one baud time before transmitting data on TX pin. But when TX FIFO is enabled and there is some data in it, I don't think there should be the 1 baud time interval between characters.

I'm sure TX FIFO is enabled when I'm sending data, and AFR = 0x14 (only RCVEN and 485EN is set, all other bits including DLY[2:0] are cleared.

Below is the captured waveform. Channel 1 (yellow) is DTR#, channel 2 (blue) is TX. The TX data is in 8-N-1 format, but because of the "1 baud time", it looks like 8-N-2. And DTR# goes low for a short period after the first character, but stay high until all the characters are transmitted.

The correct 8-N-1 waveform should be like this (captured when 485EN = 0):

Any suggestions regarding this problem? I'm not 100% sure that I have completely understood the behavior of DTR# in RS-485 mode.

3. Where is DLY3

I guess this is a minor mistake in the datasheet. It says, After both are empty (after the last stop bit of the last data byte), the DTRx output stays high for a programmable delay of 0 to 15 bit times, as set by DLY[3:0]. However, there is no DLY3 bit in the AFR, only DLY[2:0] so the programmable delay can only be 0 to 7 bit times.

Anyone can confirm this? Or is DLY3 hidden somewhere that I did not find?

Thanks in advance for any comments.

Best regards,

Albert

  • Hi Albert,

    I apologize for the delay in getting an answer out to you on this. I have moved your question to this forum so that it would get the right visibility and support. Hopefully this team will be able to get you an answer shortly.

    Thanks,

    John

  • Hello Albert,

        Here you go the answers to your questions:

        1) Until now there is no new incoming version to solve the issue.

        2) After every UART transmission the system requires one clock cycle to get ready to transmit again. This will look like an additional stop bit.

        3)The DLY bits are actually 3 ( DLY[2:0] ) and are located on the 3 most significant bits of the AFR register, giving a maximum delay of seven bit times.

    Regards,

    Diego.

  • Hi Diego,

    Thank you very much for the answer and confirmation.

    Regards,

    Albert