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SN65LVDS93DGG sending data problem

Judau Ashita
Prodigy 30 points

Other Parts Discussed in Thread: SN65LVDS93, SN65LVDS94, SN65LVDS93A

Hello,

I am using the SN65LVDS93 and SN65LVDS94 to send 18 data, from FPGA Cyclone IV, between 2 boards at 3 to 5m cable. All of unused data are pulled down. I'm using oscillator 50MHz.

One of my data is SPI clock. This SPI clock is bad when i receive it on the output of SN65LVDS94. Can you explain me about this problem? Any solution? or Can it replace by another IC?

Thank you and best regards,

Tran.Dam

  • 0
    TI__Genius 11530 points

    Hi Judau,

    From your words, it looks like this figure below. So, the CLKIN is 50MHz, is that right or other frequency?

    I am wondering if it is high speed cable problem, is it well terminated? if the reflection or cable loss is too high, the receiver would can't recovery data well. Can you capture the waveform of point 1 2 3 in the figure up? point 1--the high speed data, point 2--the out put clock, point 3--the SPI data recovered

    Best Regards

    Dylan

  • 0 in reply to Dylan Yao
    Prodigy 30 points

    Hello Dylan,

    Thank you for supporting me. I solved my problem. I change the reference clock = 4 x SPI clock, so the SPI clock is recovered at the output of the SN65LVDS94.

    I have another question. Is the SN65LVDS94 adapted to the SN65LVDS93A? I want to replace SN65LVDS93 with  SN65LVDS93A running with clock reference more than 100MHz.

  • 0 in reply to Judau Ashita
    TI__Guru* 76130 points

    Hello,

    The LVDS94 can interface directly with the LVDS93A.

    Here is an app note which is equivalent for these devices http://www.ti.com/lit/pdf/slla300

    Regards.